- May 03, 2011
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Devang Patel authored
llvm-svn: 130756
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Benjamin Kramer authored
llvm-svn: 130755
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Michael J. Spencer authored
llvm-svn: 130749
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Eric Christopher authored
string template. Fixes rdar://8493866 llvm-svn: 130747
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Dan Gohman authored
model constants which can be added to base registers via add-immediate instructions which don't require an additional register to materialize the immediate. llvm-svn: 130743
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Owen Anderson authored
Other parts of the SelectionDAG framework assume that targets use their pointer type for vector indices. Make the vector unrolling code respect that. llvm-svn: 130733
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- May 02, 2011
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Devang Patel authored
Scanning entire basic block may be too expensive in terms of compile time. Instead, just use whatever location info first non-phi instruction has. llvm-svn: 130729
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Jakob Stoklund Olesen authored
llvm-svn: 130718
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Eric Christopher authored
llvm-svn: 130716
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Jakob Stoklund Olesen authored
llvm-svn: 130715
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Jakob Stoklund Olesen authored
Def operands may also have an <undef> flag, but that just means that a sub-register redef doesn't actually read the super-register. For physical registers, it has no meaning. llvm-svn: 130714
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Duncan Sands authored
a vector compare, generate a vector result rather than i1 (and crashing). llvm-svn: 130706
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Duncan Sands authored
llvm-svn: 130705
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Devang Patel authored
This works around a limitation in gdb which is reported by following inherit.exp test failures from gdb testsuite. gdb.cp/inherit.exp: print g_vB.vB::vb gdb.cp/inherit.exp: print g_vB.vB::vx gdb.cp/inherit.exp: print g_vC.vC::vc gdb.cp/inherit.exp: print g_vC.vC::vx gdb.cp/inherit.exp: print g_vD.vB::vb ... llvm-svn: 130702
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Duncan Sands authored
This automagically provides a transform noticed by my super-optimizer as occurring quite often: "rem x, (select cond, x, 1)" -> 0. llvm-svn: 130694
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Rafael Espindola authored
llvm-svn: 130693
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Rafael Espindola authored
llvm-svn: 130692
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Rafael Espindola authored
llvm-svn: 130691
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Rafael Espindola authored
llvm-svn: 130690
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Jakob Stoklund Olesen authored
When an interfering live range ends at a dead slot index between two instructions, make sure that the inserted copy instruction gets a slot index after the dead ones. This makes it possible to avoid the interference. Ideally, there shouldn't be interference ending at a deleted instruction, but physical register coalescing can sometimes do that to sub-registers. This fixes PR9823. llvm-svn: 130687
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Nick Lewycky authored
comments claimed it did this, but the LHS value was actually an unused variable. The new system considers only the '-foo' part when comparing it for typos against flags that have values, but still look at the whole string for flags that don't. That way, we'll still correct '-inst=combine' to '-instcombine'. llvm-svn: 130685
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Nick Lewycky authored
to scope a variable more tightly per llvm coding style. No functional change. llvm-svn: 130684
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- May 01, 2011
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Chris Lattner authored
problem reported on cfe-dev. llvm-svn: 130661
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Rafael Espindola authored
llvm-svn: 130658
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NAKAMURA Takumi authored
Windows/DynamicLibrary.inc: Clean up ELM_Callback. We may check the decl instead of the versions of individual libraries. autoconf: Add checking ELM_Callback decl for mingw32 and mingw-w64. cmake/config-ix.cmake: Add checking ELM_Callback decl for win32. llvm-svn: 130657
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Chandler Carruth authored
likely a result of copy/paste. llvm-svn: 130640
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Rafael Espindola authored
-fno-dwarf2-cfi-asm. Implement the same behavior. llvm-svn: 130637
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Rafael Espindola authored
llvm-svn: 130635
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Rafael Espindola authored
for all symbol differences and can drop the old EmitPCRelSymbolValue method. This also make getExprForFDESymbol on ELF equal to the one on MachO, and it can be made non-virtual. llvm-svn: 130634
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Rafael Espindola authored
less agressive about disabling cfi on linux :-( llvm-svn: 130626
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Jakob Stoklund Olesen authored
after folding ADD32ri to ADD32mi, so don't do that. This only happens when the greedy register allocator gets itself in trouble and spills %vreg9 here: 16L %vreg9<def> = MOVPC32r 0, %ESP<imp-use>; GR32:%vreg9 48L %vreg9<def> = ADD32ri %vreg9, <es:_GLOBAL_OFFSET_TABLE_>[TF=1], %EFLAGS<imp-def,dead>; GR32:%vreg9 That should never happen, the live range should be split instead. llvm-svn: 130625
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Rafael Espindola authored
Currently the output should be almost identical to the one produced by CodeGen to make the transition easier. The only two differences I know of are: * Some files get an extra advance loc of size 0. This will be fixed when relaxations are enabled. * The optimization of declaring an EH symbol as an external variable is not implemented. This is a subset of adding the nounwind attribute, so we if really this at -O0 we should probably do it at the IL level. llvm-svn: 130623
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- Apr 30, 2011
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Jakob Stoklund Olesen authored
range covers the entire block. The live range can't be terminated at a random instruction. llvm-svn: 130619
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Benjamin Kramer authored
This obviously helps a lot if the division would be turned into a libcall (think i64 udiv on i386), but div is also one of the few remaining instructions on modern CPUs that become more expensive when the bitwidth gets bigger. This also helps register pressure on i386 when dividing chars, divb needs two 8-bit parts of a 16 bit register as input where divl uses two registers. int foo(unsigned char a) { return a/10; } int bar(unsigned char a, unsigned char b) { return a/b; } compiles into (x86_64) _foo: imull $205, %edi, %eax shrl $11, %eax ret _bar: movzbl %dil, %eax divb %sil, %al movzbl %al, %eax ret llvm-svn: 130615
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Benjamin Kramer authored
This folds away silly stuff like (a&255)/1000 -> 0. llvm-svn: 130614
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Rafael Espindola authored
is a bit ugly, but doing it on the base MCStreamer would be redundant with the object streamer which does it using SD. llvm-svn: 130611
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Rafael Espindola authored
llvm-svn: 130609
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Jakob Stoklund Olesen authored
This could happen when trying to use a value that had been eliminated after dead code elimination and folding loads. llvm-svn: 130597
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Jakob Stoklund Olesen authored
llvm-svn: 130596
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Rafael Espindola authored
the final assembly. It is the same technique used when targeting assemblers that don't support .loc. llvm-svn: 130587
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