initialize method, which can be called when an MCContext is available.

llvm-svn: 77687

llvm-svn: 77685

MCSectionWithKind subclass of MCSection.

llvm-svn: 77684

This is needed to allow polymorphic sections.

llvm-svn: 77680

into the mergable section if it is one of our special cases.  This could
obviously be improved, but this is the minimal fix and restores us to the
previous behavior.

llvm-svn: 77679

llvm-svn: 77675

llvm-svn: 77673

llvm-svn: 77667

failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661

 - This is "experimental" code, I am feeling my way around and working out the
   best way to do things (and learning tblgen in the process). Comments welcome,
   but keep in mind this stuff will change radically.

 - This is enough to match "subb" and friends, but not much else. The next step is to
   automatically generate the matchers for individual operands.

llvm-svn: 77657

mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654

llvm-svn: 77649

llvm-svn: 77646

When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.

llvm-svn: 77642

llvm-svn: 77640

llvm-svn: 77637

llvm-svn: 77636

llvm-svn: 77635

llvm-svn: 77632

llvm-svn: 77627

llvm-svn: 77625

 - This should resolve Cygwin gcc ambiguities.

llvm-svn: 77624

dangling Value*s.

llvm-svn: 77623

llvm-svn: 77622

Start using DebugInfoFinder.

llvm-svn: 77621

Thanks Benjamin Kramer!

llvm-svn: 77619

llvm-svn: 77617

llvm-svn: 77615

llvm-svn: 77614

llvm-svn: 77611

llvm-svn: 77605

llvm-svn: 77604

llvm-svn: 77602

classes. And define its SubRegClassList.

llvm-svn: 77601

llvm-svn: 77598

llvm-svn: 77597

Allow targets to define libcall names for mem(cpy,set,move) intrinsics, rather than hardcoding them in DAG lowering.

llvm-svn: 77586

llvm-svn: 77584

Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch. 

When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.

This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.

Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.

llvm-svn: 77582

a Twine, e.g., for names).
 - I am a little ambivalent about this; we don't want the string conversion of
   utostr, but using overload '+' mixed with string and integer arguments is
   sketchy. On the other hand, this particular usage is something of an idiom.

llvm-svn: 77579