- Aug 07, 2008
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Dan Gohman authored
LowerSubregs, and fix an x86-64 isel bug that this exposed. SUBREG_TO_REG for x86-64 implicit zero extension is only safe for isel to generate when the source is known to always have zeros in the high 32 bits. The EXTRACT_SUBREG instruction does not clear the high 32 bits. llvm-svn: 54444
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Dan Gohman authored
llvm-svn: 54443
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Dale Johannesen authored
are allocated in the same buffer as the code, jump tables, etc. The default JIT memory manager does not handle buffer overflow well. I didn't introduce this and I'm not attempting to fix it here, but it is more likely to be hit now since we're putting more stuff in the buffer. This affects one test that I know of so far, MultiSource/Benchmarks/NPB-serial/is. llvm-svn: 54442
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Ted Kremenek authored
llvm-svn: 54440
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rdar://problem/6125909Ted Kremenek authored
Unify logic in return-of-stack-check (Sema) for casts and implicit casts. llvm-svn: 54439
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Evan Cheng authored
Factor code that finalize PHI nodes, jump tables, etc. out of SelectBasicBlock. No functionality changes. llvm-svn: 54438
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Ted Kremenek authored
llvm-svn: 54437
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Ted Kremenek authored
llvm-svn: 54436
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Ted Kremenek authored
Cleanup some processing with DeclStmt, and gradually start using the internal BumpPtrAllocator to allocator more of CFG's data structures. llvm-svn: 54433
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Owen Anderson authored
SDISel's constant branch folding can fold away self-loops, which doesn't result in any dead blocks, but rather an incorrect phi input. Add code to UnreachableMachineBlockElim to get rid of these entries. llvm-svn: 54432
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Nuno Lopes authored
llvm-svn: 54431
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Ted Kremenek authored
llvm-svn: 54429
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Ted Kremenek authored
llvm-svn: 54428
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Owen Anderson authored
Correct handle cases where two phis are coalesced together, and correct break up the case where two different phis want to coalesce with the same vreg. llvm-svn: 54426
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- Aug 06, 2008
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Owen Anderson authored
llvm-svn: 54425
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Ted Kremenek authored
llvm-svn: 54424
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Ted Kremenek authored
llvm-svn: 54423
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Owen Anderson authored
llvm-svn: 54422
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Owen Anderson authored
llvm-svn: 54421
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Owen Anderson authored
llvm-svn: 54420
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Dan Gohman authored
this time using MOV32to32_ and MOV16to16_. Thanks to Evan for suggesting this. llvm-svn: 54418
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Dan Gohman authored
when it meant to be emitting undef indices. llvm-svn: 54417
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Evan Cheng authored
llvm-svn: 54416
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Evan Cheng authored
Fix PR2355: bug in ChangeCompareStride. When the loop termination compare is the only use of its iv stride, the stride can be eliminated by moving it to another stride. If the scale is negative, swap the predicate instead of using a inverse predicate. llvm-svn: 54415
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Daniel Dunbar authored
llvm-svn: 54414
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Daniel Dunbar authored
- Change hardcoded assembly instructions to a use of 'opt' (still waiting for someone to yell at me for this). - Add some cases to cover behavior fixed by previous commit. llvm-svn: 54413
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rdar://problem/6113807Steve Naroff authored
While this is a safe rewriter fix, there is still a need for some discussion (see report for more info). llvm-svn: 54412
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Dan Gohman authored
llvm-svn: 54411
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Ted Kremenek authored
When serializing DeclStmt, encode a bit indicating whether or not the DeclStmt owns the Decl. This is an interim solution. llvm-svn: 54410
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Dan Gohman authored
llvm-svn: 54409
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Chris Lattner authored
llvm-svn: 54408
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Bruno Cardoso Lopes authored
Added fp register clobbering during calls. Added AsmPrinter support for "fmask", a bitmask that indicates where on the stack the fp callee saved registers are. Fixed the stack frame layout for Mips, now the callee saved regs are in the right stack location (a little documentation about how this stack frame must look like is present in MipsRegisterInfo.cpp). This was done using the method MipsRegisterInfo::adjustMipsStackFrame To be more clear, these are examples of what is solves : 1) FP and RA are also callee saved, and despite they aren't in CSI they must be saved before the fp callee saved registers. 2) The ABI requires that local varibles are allocated before the callee saved register area, the opposite behavior from the default allocation. 3) CPU and FPU saved register area must be aligned independent of each other. llvm-svn: 54403
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Chris Lattner authored
llvm-svn: 54400
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Chris Lattner authored
llvm-svn: 54398
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Daniel Dunbar authored
- PR2643 llvm-svn: 54397
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Chris Lattner authored
matters, the result is undefined anyway. llvm-svn: 54396
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Daniel Dunbar authored
type. - This generates somewhat less optimal code than before but this is not hard to rectify once stable (at the cost of slightly more complex code). - This currently always uses little-endian ordering of the bitfield. - This breaks the CodeGen/bitfield.c test because it was grepping for hard-coded assembly instructions. Will fix once a better test case is constructed (hard to do without execution). - This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c and Regression/C/PR1386.c from the test suite. - <rdar://problem/6085090>, <rdar://problem/6094169> llvm-svn: 54395
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Nick Lewycky authored
tracking down that this was breaking llvm-gcc bootstrap on Linux. llvm-svn: 54394
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Ted Kremenek authored
llvm-svn: 54393
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Daniel Dunbar authored
- Changed EmitSub to work on all cases (arithmetic, ptr - int, ptr - ptr) so that implementation matches that of other operators. - Modify EmitCompoundAssign to compute and perform the appropriate casts of left, right, and result types for the assorted pointer arithmetic cases. - Fix EmitSub (ptr - int) case to negate the rhs *after* extension. This is critical when the rhs is unsigned (and needs extension). - This fixes cfrac. - <rdr://6115726> llvm-svn: 54392
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