Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when
it checks if ESI is available, it then looks at registers aliases to ESI. SIL is marked -2 (not allocatable) but isPhysRegAvailable() incorrectly assumes it is in use and returns false for ESI.

llvm-svn: 47499

llvm-svn: 47496

llvm-svn: 47495

llvm-svn: 47494

llvm-svn: 47492

llvm-svn: 47485

the way through.  It is now used for codegen.

llvm-svn: 47484

llvm-svn: 47483

llvm-svn: 47479

llvm-svn: 47478

llvm-svn: 47476

the definition of the operand also reaches its uses.

llvm-svn: 47475

instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474

llvm-svn: 47473

llvm-svn: 47472

llvm-svn: 47471

GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470

llvm-svn: 47468

that a value is >= 32, check that all of the high bits are zero, not
just one or more.

llvm-svn: 47467

llvm-svn: 47461

llvm-svn: 47460

new things.

llvm-svn: 47458

early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.

llvm-svn: 47457

any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.

llvm-svn: 47454

llvm-svn: 47453

llvm-svn: 47452

llvm-svn: 47448

llvm-svn: 47437

llvm-svn: 47435

llvm-svn: 47434

llvm-svn: 47433

llvm-svn: 47431

Atomic op support.  If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet

llvm-svn: 47430

Eli Friedman.  This implements CodeGen/Generic/2008-02-20-MatchingMem.ll.

llvm-svn: 47428

inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.

llvm-svn: 47426

llvm-svn: 47425

Now, we have very first multiple return value testcase!

llvm-svn: 47424

llvm-svn: 47416

llvm-svn: 47408

	ret i32 1, i8 2
another step towards multiple return value support.

llvm-svn: 47407