instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll

llvm-svn: 31876

llvm-svn: 31874

First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.

llvm-svn: 31867

Retain the signedness of the old integer types in a new TypeInfo structure
so that it can be used in the grammar to implement auto-upgrade of things
that depended on signedness of types. This doesn't implement any new
functionality in the AsmParser, its just plumbing for future changes.

llvm-svn: 31866

simplified before we do this xform so that our cost model is accurate.

llvm-svn: 31864

llvm-svn: 31861

llvm-svn: 31857

This speeds up yacr2 by 7% on a core2.

llvm-svn: 31856

  if (cond) goto BB2
BB1:
    ...
    return;
BB2:
   ...

Move BB1 to the end of the function so that the code falls through in the
non-return case.  This has the effect of moving assert (and other no-return
call) bodies and return blocks out of loops.

llvm-svn: 31855

only do these transformations if there are a small number of phi's.
This speeds up Ptrdist/ks from 2.35s to 2.19s on my mac pro.

llvm-svn: 31853

llvm-svn: 31841

Also, valist should create a pointer RC reg class value, not a GPRC value.

llvm-svn: 31840

llvm-svn: 31839

llvm-svn: 31838

The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.

llvm-svn: 31837

issues to the ground.

llvm-svn: 31836

value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(

llvm-svn: 31835

llvm-svn: 31834

llvm-svn: 31833

clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832

llvm-svn: 31830

llvm-svn: 31828

2. Offsets on 64-bit stores are still in bytes.

llvm-svn: 31824

llvm-svn: 31823

llvm-svn: 31822

llvm-svn: 31819

soon replace all uses of those objects.

llvm-svn: 31817

llvm-svn: 31816

llvm-svn: 31815

llvm-svn: 31814

llvm-svn: 31813

llvm-svn: 31812

llvm-svn: 31811

llvm-svn: 31810

and handle it like constant stride vars.  This fixes some bad codegen in
variable stride cases.  For example, it compiles this:

void foo(int k, int i) {
  for (k=i+i; k <= 8192; k+=i)
    flags2[k] = 0;
}

to:

LBB1_1: #bb.preheader
        movl %eax, %ecx
        addl %ecx, %ecx
        movl L_flags2$non_lazy_ptr, %edx
LBB1_2: #bb
        movb $0, (%edx,%ecx)
        addl %eax, %ecx
        cmpl $8192, %ecx
        jle LBB1_2      #bb
LBB1_5: #return
        ret

or (if the array is local and we are in dynamic-nonpic or static mode):

LBB3_2: #bb
        movb $0, _flags2(%ecx)
        addl %eax, %ecx
        cmpl $8192, %ecx
        jle LBB3_2      #bb

and:

        lis r2, ha16(L_flags2$non_lazy_ptr)
        lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
        slwi r3, r4, 1
LBB1_2: ;bb
        li r5, 0
        add r6, r4, r3
        stbx r5, r2, r3
        cmpwi cr0, r6, 8192
        bgt cr0, LBB1_5 ;return

instead of:

        leal (%eax,%eax,2), %ecx
        movl %eax, %edx
        addl %edx, %edx
        addl L_flags2$non_lazy_ptr, %edx
        xorl %esi, %esi
LBB1_2: #bb
        movb $0, (%edx,%esi)
        movl %eax, %edi
        addl %esi, %edi
        addl %ecx, %esi
        cmpl $8192, %esi
        jg LBB1_5       #return

and:

        lis r2, ha16(L_flags2$non_lazy_ptr)
        lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
        mulli r3, r4, 3
        slwi r5, r4, 1
        li r6, 0
        add r2, r2, r5
LBB1_2: ;bb
        li r5, 0
        add r7, r3, r6
        stbx r5, r2, r6
        add r6, r4, r6
        cmpwi cr0, r7, 8192
        ble cr0, LBB1_2 ;bb

This speeds up Benchmarks/Shootout/sieve from 8.533s to 6.464s and
implements LoopStrengthReduce/var_stride_used_by_compare.ll

llvm-svn: 31809

llvm-svn: 31806

llvm-svn: 31805

a #include of iostream.

llvm-svn: 31800

llvm-svn: 31799

stream. It centralizes the use of std::cerr so that static c'tor/d'tors
aren't scattered around all over the place. The way to use it is like this:

       DOUT << "This is a status line: " << Var << "\n";

If "-debug" is specified, it will print. Otherwise, it'll not print. If
NDEBUG is defined, the DOUT does nothing.

llvm-svn: 31798