Patch by Johnny Chen.

llvm-svn: 84767

llvm-svn: 84766

llvm-svn: 84751

llvm-svn: 84738

Thanks to Johnny Chen for discovering the problem.

llvm-svn: 84732

a default value of zero.  This is important for decoding the instructions.
Patch by Johnny Chen, with some changes from me, too.

llvm-svn: 84730

llvm-svn: 84687

llvm-svn: 84669

llvm-svn: 84664

llvm-svn: 84632

llvm-svn: 84614

present.

llvm-svn: 84613

llvm-svn: 84611

llvm-svn: 84600

functions are not needed.

llvm-svn: 84587

llvm-svn: 84585

llvm-svn: 84583

reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing 
identical output except for superior formatting of constant pool entries.

llvm-svn: 84582

llvm-svn: 84579

llvm-svn: 84577

llvm-svn: 84575

llvm-svn: 84573

Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.

Patch by Johnny Chen.

llvm-svn: 84572

Patch by Johnny Chen.

llvm-svn: 84570

by ignoring all implicit regs when lowering.

llvm-svn: 84566

llvm-svn: 84563

llvm-svn: 84562

llvm-svn: 84561

like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)

llvm-svn: 84558

appropriate restore location for the spill as well as perform the actual
save and restore.

The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.

llvm-svn: 84554

llvm-svn: 84553

_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.

llvm-svn: 84546

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 

llvm-svn: 84543

lowering stuff.  We can now compile hello world to:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 
	ldr r0, 
	bl _printf
	ldr r0, 
	mov sp, r7
	ldm , 

Almost looks like arm code :)

llvm-svn: 84542

llvm-svn: 84536

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 

llvm-svn: 84535

we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 

llvm-svn: 84532

llvm-svn: 84531

through mcinst lowering -> mcinstprinter, when llc is passed
the -enable-arm-mcinst-printer flag.  Currently this
is very "aborty".

llvm-svn: 84530

"something" when printing MCInsts, it will just be missing all the 
operand info.

llvm-svn: 84528