synthesized method for the property. rdar://9771715

llvm-svn: 137248

of string literals ("hello"[2]).  Also fixed a
problem in which empty string literals were not
being compiled correctly ((int)printf("") would
print garbage).

Added a testcase that covers both.

llvm-svn: 137247

llvm-svn: 137246

llvm-svn: 137245

llvm-svn: 137244

llvm-svn: 137243

llvm-svn: 137242

llvm-svn: 137241

llvm-svn: 137240

data in-register prior to saving to memory.  When we reorder the data in memory
we prevent the need to save multiple scalars to memory, making a single regular
store.

llvm-svn: 137238

llvm-svn: 137237

llvm-svn: 137236

llvm-svn: 137234

Use an Init (ultimately a StringInit) to represent the Record name.
This allows the name to be composed by standard TableGen operators.
This will enable us to get rid of the ugly #NAME# hack processing and
naturally replace it with operators.  It also increases flexibility
and power of the TableGen language by allowing record identifiers to
be computed dynamically.

llvm-svn: 137232

Add a method to return an Init as an unquoted string.  This primarily
affects StringInit where we return the value without surrounding it
with quotes.

This is in preparation for removing the ugly #NAME# hack and replacing
it with standard TabelGen operators.

llvm-svn: 137231

Renamings to consistently use 'Constexpr' not 'ConstExpr' when referring to the C++0x 'constexpr' keyword.

llvm-svn: 137230

Also, my apologies for spoiling the autocomplete on SimplifyInstructions.cpp. I couldn't think of a better filename.

llvm-svn: 137229

llvm-svn: 137228

def : Pat<(X86Movss VR128:$src1,
                   (bc_v4i32 (v2i64 (load addr:$src2)))),
          (MOVLPSrm VR128:$src1, addr:$src2)>;
This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits. A testcase is added and illustrates the bug and also modified the one that was already present. Patch by Tanya Lattner.

llvm-svn: 137227

llvm-svn: 137226

llvm-svn: 137225

llvm-svn: 137224

Rewrite some ARM InstrInfo functions to be most accepting of arbitrary register subclasses.  Hopefully this fixes some buildbots.

llvm-svn: 137223

overridden  methods to diagnose their type mismatch.
This is a general solution for previous fixes
for // rdar://6191214 and // rdar://9352731
and removes lots of duplicate code.

llvm-svn: 137222

Expand test of C++0x [class.copymove]p15 to make sure we're actually calling the copy constructor of a base/member from an explicitly-defaulted copy constructor, rather than the default constructor

llvm-svn: 137220

special member function, make sure to classify an explicitly-defaulted
copy constructor as a "copy" operation. Fixes PR10622.

llvm-svn: 137219

llvm-svn: 137218

llvm-svn: 137217

llvm-svn: 137216

in the same version that it is introduced. Stuff happens.

llvm-svn: 137214

llvm-svn: 137213

constructor. Previously, we did some bogus recursion into the fields
of anonymous structs (recursively), which ended up building invalid
ASTs that would cause CodeGen to crash due to invalid GEPs.

Now, we instead build the default initializations based on the
indirect field declarations at the top level, which properly generates
the sequence of GEPs needed to initialize the proper member. Fixes
PR10512 and <rdar://problem/9924046>.

llvm-svn: 137212

llvm-svn: 137208

llvm-svn: 137204

llvm-svn: 137203

SimplifyIndVar utility since it is required.

llvm-svn: 137202

in time when this assert was valid, but it's not valid now.
Also teach this code to correctly introduce function-to-pointer
decay.

llvm-svn: 137201

llvm-svn: 137200

llvm-svn: 137199

llvm-svn: 137198