llvm-svn: 144099

llvm-svn: 144095

implements unaligned loads and stores with assembler macro-instructions
ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions
instead of these macros. Since each unaligned load/store is expanded
into two corresponding loads/stores where offset for second load/store is
modified by +3 (for words) or +1 (for halfwords).

Patch by Petar Jovanovic and Sasa Stankovic.

llvm-svn: 144081

llvm-svn: 144071

llvm-svn: 144057

Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on.  Fixes PR11318.

Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.

llvm-svn: 144055

Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222

llvm-svn: 144052

callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).

llvm-svn: 144047

llvm-svn: 144044

Delete!

llvm-svn: 144043

DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed.  This typically means the PS domain on x86.

For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.

llvm-svn: 144037

Fixes r8429

llvm-svn: 144036

Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on.  Fixes PR11318.

llvm-svn: 144034

llvm-svn: 144027

The enterBasicBlock() function is combining live-out values from
predecessor blocks.  The RPO traversal means that more predecessors
have been visited when that happens, only back-edges are missing.

llvm-svn: 144025

llvm-svn: 144024

llvm-svn: 144023

llvm-svn: 144021

llvm-svn: 144020

llvm-svn: 144019

and add Mips64's version too.

llvm-svn: 144018

registers.

llvm-svn: 144017

floating pointer registers.

llvm-svn: 144016

llvm-svn: 144015

llvm-svn: 144014

As a side effect hex is printed lowercase instead of uppercase now.

llvm-svn: 144013

llvm-svn: 144012

<rdar://problem/10405911>

llvm-svn: 144000

The xorps instruction is smaller than pxor, so prefer that encoding.

The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.

llvm-svn: 143996

llvm-svn: 143994

llvm-svn: 143993

is used to save va_arg or byval arguments passed in registers.

llvm-svn: 143992

llvm-svn: 143991

when shift amount is larger than 32.

llvm-svn: 143990

instruction definitions.

llvm-svn: 143989

llvm-svn: 143988

llvm-svn: 143982

llvm-svn: 143974

Fixes a self-host error.

llvm-svn: 143970

and TargetLowering::BuildUDIV(). Fixes PR11283

llvm-svn: 143964