is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.

llvm-svn: 63642

Duncan spotted this. Thanks!

llvm-svn: 63641

accessed at least once as a vector.  This prevents it from
compiling the example in not-a-vector into:

define double @test(double %A, double %B) {
	%tmp4 = insertelement <7 x double> undef, double %A, i32 0
	%tmp = insertelement <7 x double> %tmp4, double %B, i32 4
	%tmp2 = extractelement <7 x double> %tmp, i32 4
	ret double %tmp2
}

instead, producing the integer code.  Producing vectors when they
aren't otherwise in the program is dangerous because a lot of other
code treats them carefully and doesn't want to break them down.
OTOH, many things want to break down tasty i448's.

llvm-svn: 63638

in any old order.  Since analyzing a node analyzes its
operands also, this can mean that when we pop a node
off the list of nodes to be analyzed, it may already
have been analyzed.

llvm-svn: 63632

llvm-svn: 63631

llvm-svn: 63620

llvm-svn: 63618

llvm-svn: 63616

llvm-svn: 63600

llvm-svn: 63599

initial PHI nodes of the machine function.

llvm-svn: 63598

the index of the value being extracted is always an i32.  This fixes PR3465

llvm-svn: 63597

crazy cases like:

struct f {  int A, B, C, D, E, F; };
short test4() {
  struct f A;
  A.A = 1;
  memset(&A.B, 2, 12);
  return A.C;
}

llvm-svn: 63596

llvm-svn: 63595

llvm-svn: 63594

correct. We need more infrastructure before we can get the DebugLoc info for
these instructions.

llvm-svn: 63593

llvm-svn: 63591

With the new world order, it can handle cases where the first
store into the alloca is an element of the vector, instead of
requiring the first analyzed store to have the vector type 
itself.  This allows us to un-xfail 
test/CodeGen/X86/vec_ins_extract.ll.

llvm-svn: 63590

they are useful to analyses other than BasicAliasAnalysis.cpp. Include
the full comment for isIdentifiedObject in the header file. Thanks to
Chris for suggeseting this.

llvm-svn: 63589

llvm-svn: 63585

created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.

llvm-svn: 63584

into SimplifySetCC which gets called elsewhere.

llvm-svn: 63583

information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.

llvm-svn: 63577

SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.

llvm-svn: 63575

llvm-svn: 63574

except LegalizeOp itself.

llvm-svn: 63560

option to make the -fno- form on the option.  We also document the new
form in the CommandLine documentation.

llvm-svn: 63559

Live interval reconstruction needs to account for this, and scour its maps to
prevent dangling references.

llvm-svn: 63558

among others.

llvm-svn: 63555

Add an assert to check HasX86_64 status.

llvm-svn: 63552

llvm-svn: 63545

llvm-svn: 63544

llvm-svn: 63543

llvm-svn: 63542

llvm-svn: 63540

llvm-svn: 63537

llvm-svn: 63536

tests.  Thanks for the beautiful reduced testcase Duncan!

llvm-svn: 63529

llvm-svn: 63527

llvm-svn: 63523