Commits · 56606a4db3e7c6b4a1b3bfd3b2dfc04c81a2247e · Roger Ferrer / llvm-epi-0.8 · GitLab

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Aug 21, 2019
- [AArch64][GlobalISel] Add support for narrowScalar of G_ZEXT · 56606a4d
  Amara Emerson authored Aug 21, 2019
  56606a4d
- [X86] Automatically generate shift tests. NFC · 4ccf5ba9
  Amaury Sechet authored Aug 20, 2019
  4ccf5ba9
- [X86] Autogenerate vec_* tests. NFC · 33c283ad
  Amaury Sechet authored Aug 20, 2019
  33c283ad
- [RISCV GlobalISel] Adding initial GlobalISel infrastructure · a16bd4f9
  Daniel Sanders authored Aug 20, 2019
  a16bd4f9
- [AArch64][GlobalISel] Select logical_imm32 and logical_imm64 patterns · e6c299b9
  Jessica Paquette authored Aug 20, 2019
  e6c299b9
- [AArch64][GlobalISel] Select patterns which use shifted register operands · 9a95e79b
  Jessica Paquette authored Aug 20, 2019
  9a95e79b
- [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (concat_vectors... · ba375263
  Craig Topper authored Aug 20, 2019
  ba375263
- Revert [WinEH] Allocate space in funclets stack to save XMM CSRs · 22fb7349
  Reid Kleckner authored Aug 20, 2019
  22fb7349
- Adds support for writing the .bss section for XCOFF object files. · 1e46d4ce
  Sean Fertile authored Aug 20, 2019
  1e46d4ce
Aug 20, 2019
- [test] Fix tests when run on windows after SVN r369426. NFC. · 10095715
  Martin Storsjo authored Aug 20, 2019
  10095715
- [X86] Add a DAG combine to transform (i8 (bitcast (v8i1 (extract_subvector... · 3a2b08e6
  Craig Topper authored Aug 20, 2019
  3a2b08e6
- [X86] Add isel patterns for (i64 (zext (i8 (bitcast (v16i1 X))))) to use a... · 250951ab
  Craig Topper authored Aug 20, 2019
  250951ab
- [TargetMachine] Don't try to create COFFSTUB references on windows on non-COFF · 514f3a12
  Martin Storsjo authored Aug 20, 2019
  514f3a12
- Revert "AMDGPU: Fix iterator error when lowering SI_END_CF" · 4b7fc85c
  Matt Arsenault authored Aug 20, 2019
  4b7fc85c
- [CodeGen] Add EarlyIfConvert test missed in previous commit · 53ab6bef
  Thomas Raoux authored Aug 20, 2019
  53ab6bef
- [ARM] Select vaddva · dcfc2d40
  Sam Tebbs authored Aug 20, 2019
  dcfc2d40
- [GlobalISel] Handle multiple registers in dbg.value intrinsic · 08bd0808
  Aditya Nandakumar authored Aug 20, 2019
  08bd0808
- [X86][FMA] Add FMA 'negated expression' combine tests for D63141 · cec028fc
  Simon Pilgrim authored Aug 20, 2019
  cec028fc
Aug 19, 2019
- Fixed placement of llvm.global_dtors on Windows. · f7229ac7
  Vyacheslav Zakharin authored Aug 19, 2019
  f7229ac7
- MemTag: stack initializer merging. · 50affbe4
  Evgeniy Stepanov authored Aug 19, 2019
  50affbe4
- [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than... · a0d92c72
  Craig Topper authored Aug 19, 2019
  a0d92c72
- [TargetLowering] x s% C == 0 fold: vector divisor with INT_MIN handling · edfaee08
  Roman Lebedev authored Aug 19, 2019
  edfaee08
- Automatically generate AVX512 test cases. NFC · 81301541
  Amaury Sechet authored Aug 19, 2019
  81301541
- [PeepholeOptimizer] Don't assume bitcast def always has input · 0776da52
  Jinsong Ji authored Aug 19, 2019
  0776da52
- [DebugInfo] Allow bundled calls in the MIR's call site info · 88df53e6
  David Stenberg authored Aug 19, 2019
  88df53e6
- [ARM] Add support for MVE vaddv · f312c1ec
  Sam Tebbs authored Aug 19, 2019
  f312c1ec
- [X86] Teach lower1BitShuffle to match right shifts with upper zero elements on... · ebb7ddc6
  Craig Topper authored Aug 19, 2019
  ebb7ddc6
- [X86] Teach lower1BitShuffle to match KSHIFTR that doesn't use Zeroable and only relies on undef. · 269c6b1c
  Craig Topper authored Aug 19, 2019
  269c6b1c
- [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros with... · 2eb7951d
  Craig Topper authored Aug 19, 2019
  2eb7951d
- [X86] Add test case for missed opportunity to recognize a vXi1 shuffle as an... · c9ee4c7c
  Craig Topper authored Aug 19, 2019
  c9ee4c7c
- [X86] Add a special case to LowerCONCAT_VECTORSvXi1 to handle concatenating... · 2ee46c7c
  Craig Topper authored Aug 18, 2019
  2ee46c7c
- [X86] Add test cases for suboptimal insertion of a vXi1 vector into a larger... · 6bd2e8ef
  Craig Topper authored Aug 18, 2019
  6bd2e8ef
Aug 18, 2019
- [X86] Improve lower1BitShuffle handling for KSHIFTL on narrow vectors. · 9e074c06
  Craig Topper authored Aug 18, 2019
  9e074c06
- [X86] isTargetShuffleEquivalent - add BUILD_VECTOR matching · fee2546f
  Simon Pilgrim authored Aug 18, 2019
  fee2546f
- [X86][SSE] Improve PACKSS shuffle tests to better match codegen from D61129 · 133e2d7b
  Simon Pilgrim authored Aug 18, 2019
  133e2d7b
- [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16... · 74168ded
  Craig Topper authored Aug 18, 2019
  74168ded
- AMDGPU: Fix iterator error when lowering SI_END_CF · 479f3bdb
  Matt Arsenault authored Aug 18, 2019
  479f3bdb
- [X86] Add a one use check to the combineStore code that handles v16i16->v16i8... · 31f829f0
  Craig Topper authored Aug 17, 2019
  31f829f0
- [BPF] Fix bpf llvm-objdump issues. · a8dad5c7
  Yonghong Song authored Aug 17, 2019
  a8dad5c7
Aug 17, 2019
- [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks · b3d258fc
  Kang Zhang authored Aug 17, 2019
  b3d258fc