llvm-svn: 21179

  * fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.

llvm-svn: 21178

case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr

llvm-svn: 21177

to back for certain fsel instructions.

llvm-svn: 21176

llvm-svn: 21175

lets hope this doesn't break other programs with induced entropy

llvm-svn: 21174

llvm-svn: 21173

is deconstructed then reconstructed here.  This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.

This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.

This depends on the previous CFE patch to expose these correctly.

llvm-svn: 21171

llvm-svn: 21170

llvm-svn: 21169

missing some and not all of these match yet, but I'm sure that Nate will
clean up my mess :)

llvm-svn: 21168

llvm-svn: 21167

llvm-svn: 21166

llvm-svn: 21165

llvm-svn: 21164

llvm-svn: 21163

llvm-svn: 21162

32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
     Pattern match fsub a, mul(b, c) as fnmsub
     Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%

llvm-svn: 21161

llvm-svn: 21160

llvm-svn: 21159

llvm-svn: 21158

llvm-svn: 21157

collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant

llvm-svn: 21156

llvm-svn: 21155

llvm-svn: 21154

fix hack in division (clean up frcpa instruction)

llvm-svn: 21153

llvm-svn: 21152

llvm-svn: 21151

Optimized code sequence for (a < 0) ? b : 0

llvm-svn: 21150

llvm-svn: 21149

this into sign/zero extension instructions later.

On PPC, for example, this testcase:

%G = external global sbyte
implementation
void %test(int %X, int %Y) {
  %C = setlt int %X, %Y
  %D = cast bool %C to sbyte
  store sbyte %D, sbyte* %G
  ret void
}

Now codegens to:

        cmpw cr0, r3, r4
        li r3, 1
        li r4, 0
        blt .LBB_test_2 ;
.LBB_test_1:    ;
        or r3, r4, r4
.LBB_test_2:    ;
        addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
        lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
        stb r3, 0(r2)

instead of:

        cmpw cr0, r3, r4
        li r3, 1
        li r4, 0
        blt .LBB_test_2 ;
.LBB_test_1:    ;
        or r3, r4, r4
.LBB_test_2:    ;
***     rlwinm r3, r3, 0, 31, 31
        addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
        lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
        stb r3, 0(r2)

llvm-svn: 21148

llvm-svn: 21147

llvm-svn: 21146

what the contents of the top bits of these registers are, in the common cases
of targets that sign and zero extend the results.

llvm-svn: 21145

llvm-svn: 21144

llvm-svn: 21143

(likewise for <= >=u >=u).

Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'

On powerpc, for example, this changes this:

        lis r2, 32767
        ori r2, r2, 65535
        cmplw cr0, r3, r2
        bgt .LBB_test_2

into:

        cmpwi cr0, r3, 0
        blt .LBB_test_2

llvm-svn: 21142

llvm-svn: 21141

fixup magic constant making code.  tested by thousands of random divisions.... by 10000.  ok, so random divisors would be good too, but this at least fixes some things

llvm-svn: 21140

llvm-svn: 21139