llvm-svn: 159259

'check-llvm'.

Don't worry! 'check' still works! =] To rationalize the names of targets
used to run tests, the vague plan is the following:

make check-llvm  # run LLVM reg/unit tests  (currently 'check')
make check-clang # run Clang reg/unit tests (currently 'clang-test')
make check-rt    # run CompilerRT reg/unit tests
make check-asan  # run ASan reg/unit tests (subset of -rt)
make check-tsan  # run TSan reg/unit tests (subset of -rt)
make check-all   # run as much of the above as is available

The last one respects what projects are checked out and built for
a given tree. Personally, I would like to eventually make 'check' be an
alias for 'check-all'. For now however, it is an alias for 'check-llvm',
and thus no behavior has changed.

While this patch and my plan only really apply to CMake, I think it
might be good to similarly rationalize the naming scheme for the Make
builds.

llvm-svn: 159258

llvm-svn: 159257

add interface for removing a FileEntry from the cache.
Forces a re-read the contents from disk, e.g. because a tool (like cling) wants to pick up a modified file.

llvm-svn: 159256

just-built Clang binary, and linking them against the just-built ASan
runtime.

This is *very* brittle. I expect it will require tweaking, and I've
pro-actively disabled it on non-Unix builds and on cross-builds.

It is also currently missing dependency edges on GoogleTest header files
and a few other corner cases, but those can be fixed. This is the major
milestone of a mini-bootstrap-like build of the unittest.

llvm-svn: 159255

llvm-svn: 159254

llvm-svn: 159253

the current version of clang understands __attribute__((unused)) on
fields.

llvm-svn: 159252

llvm-svn: 159251

Add a few (currently failing) tests for the PR13207 (template mangling in the presence of back references).

I've added an extra FileCheck pass for that with an extra "CURRENT" prefix.
I've carefully chosed the CURRENT/CORRECT prefixes so they
a) are self-descriptive
b) have the same length so the mangling between the current and the correct version is obvious

Feel free to ask me to change the prefixes if you know a better alternative.

llvm-svn: 159250

llvm-svn: 159249

llvm-svn: 159248

llvm-svn: 159247

llvm-svn: 159246

llvm-svn: 159245

llvm-svn: 159244

llvm-svn: 159243

llvm-svn: 159242

suitable for building as a whole-project.

llvm-svn: 159241

llvm-svn: 159240

llvm-svn: 159239

Don't override a custom diagnostic w/ a generic InvalidOperand, all else
being equal.

llvm-svn: 159238

It's not necessary for each DI class to have its own copy of `print' and
`dump'. Instead, just give DIDescriptor those methods and have it call the
appropriate debugging printing routine based on the type of the debug
information.

llvm-svn: 159237

Add a missing check to avoid dereference null. No sensible test case possible. Sorry. rdar://11745134

llvm-svn: 159236

llvm-svn: 159235

llvm-svn: 159234

llvm-svn: 159233

This is only implemented on linux at the moment.

llvm-svn: 159232

in subclasses.

llvm-svn: 159231

    // C - zext(bool) -> bool ? C - 1 : C
    if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1))
      if (ZI->getSrcTy()->isIntegerTy(1))
        return SelectInst::Create(ZI->getOperand(0), SubOne(C), C);

This ends up forming sext i1 instructions that codegen to terrible code. e.g.
int blah(_Bool x, _Bool y) {
  return (x - y) + 1;
}
=>
        movzbl  %dil, %eax
        movzbl  %sil, %ecx
        shll    $31, %ecx
        sarl    $31, %ecx
        leal    1(%rax,%rcx), %eax
        ret


Without the rule, llvm now generates:
        movzbl  %sil, %ecx
        movzbl  %dil, %eax
        incl    %eax
        subl    %ecx, %eax
        ret

It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-).

The transformation was done as part of Eli's r75531. He has given the ok to
remove it.

rdar://11748024

llvm-svn: 159230

llvm-svn: 159229

The cpuid registers are only available in privileged mode so we don't have
an OS-independent way of implementing this. ARM doesn't provide a list of
processor IDs so the list is somewhat incomplete.

llvm-svn: 159228

llvm-svn: 159227

as a gcc supported extension with usual treatment
with -pedantic (warn) and -pedantic-errors (error).
// rdar://11550996

llvm-svn: 159226

llvm-svn: 159225

llvm-svn: 159224

llvm-svn: 159223

Support the following intrinsics:
  _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd
  _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps
  _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps

llvm-svn: 159222

Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256

Modified Disassembler to handle VSIB addressing mode.

llvm-svn: 159221

the member expression is qualified, call the method specified in the code,
not the most derived one we can find.

llvm-svn: 159219