Commits · 587fe6cd523633675ab8e04de80fd3c71e633f16 · Roger Ferrer / llvm-epi-0.8

Sep 30, 2011
- Add MCELFObjectTargetWriter and MCAsmBackend classes. · 587fe6cd
  Akira Hatanaka authored Sep 30, 2011
```
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140885
```
  587fe6cd
- Update CMake build. · 3bad73a9
  Benjamin Kramer authored Sep 30, 2011
```
llvm-svn: 140879
```
  3bad73a9
- Initial implementation of MipsMCCodeEmitter. · 750ecec7
  Akira Hatanaka authored Sep 30, 2011
```
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878
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  750ecec7
- Add definitions of Mips64 rotate instructions. · 7ba8a8d6
  Akira Hatanaka authored Sep 30, 2011
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llvm-svn: 140870
```
  7ba8a8d6
- Constify 'isLSDA' and move a method out-of-line. · e8e4dbf4
  Bill Wendling authored Sep 30, 2011
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llvm-svn: 140868
```
  e8e4dbf4
- ARM Darwin default relocation model is PIC. · 4e0dbee6
  Jim Grosbach authored Sep 30, 2011
```
This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863
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  4e0dbee6
- isCommutable should be 0 for DSUBu. · 9727af76
  Akira Hatanaka authored Sep 30, 2011
```
llvm-svn: 140862
```
  9727af76
- ARM Fixup valus for movt/movw are for the whole value. · d2222c38
  Jim Grosbach authored Sep 30, 2011
```
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509

llvm-svn: 140861
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  d2222c38
- PTX: Various stylistic and code readability changes recommended by Jim Grosbach. · ea3f90ae
  Justin Holewinski authored Sep 30, 2011
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llvm-svn: 140855
```
  ea3f90ae
- PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs. · 957a6d5c
  Justin Holewinski authored Sep 30, 2011
```
Also take this opportunity to clean up the rounding mode pass.

llvm-svn: 140854
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  957a6d5c
- PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires · 3111d11f
  Justin Holewinski authored Sep 30, 2011
```
us to manually provide Pat<> definitions for all FP instruction patterns.

llvm-svn: 140849
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  3111d11f
- Mips64 shift instructions. · 61e256aa
  Akira Hatanaka authored Sep 30, 2011
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llvm-svn: 140841
```
  61e256aa
- Mips64 arithmetic and logical instructions with one source register and · 7769a777
  Akira Hatanaka authored Sep 30, 2011
```
immediate.

llvm-svn: 140839
```
  7769a777
- ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. · efc761a1
  Jim Grosbach authored Sep 30, 2011
```
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428

llvm-svn: 140834
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  efc761a1
- Fill delay slot with useful instructions. Modified from Sparc's version of delay · f2619ee3
  Akira Hatanaka authored Sep 29, 2011
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slot filler.

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140825
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  f2619ee3
- Create a machine basic block in the constant pool and retrieve the symbol for an MBB. · 69bc3de4
  Bill Wendling authored Sep 29, 2011
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llvm-svn: 140824
```
  69bc3de4
- Support creating a constant pool value for a machine basic block. · a1127b2f
  Bill Wendling authored Sep 29, 2011
```
This is used when we want to take the address of a machine basic block, but it's
not associated with a BB in LLVM IR.

llvm-svn: 140823
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  a1127b2f
Sep 29, 2011
- Mips64 arithmetic and logical instructions with two source registers. · 36036412
  Akira Hatanaka authored Sep 29, 2011
```
llvm-svn: 140806
```
  36036412
- Clean up uses of switch instructions so they are not dependent on the operand... · 95031ed8
  Eli Friedman authored Sep 29, 2011
```
Clean up uses of switch instructions so they are not dependent on the operand ordering.  Patch by Stepan Dyatkovskiy.

llvm-svn: 140803
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  95031ed8
- PTX: Fix broken shared library build · abcc5766
  Justin Holewinski authored Sep 29, 2011
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llvm-svn: 140783
```
  abcc5766
- Expand the x86 V_SET0* pseudos right after register allocation. · dd1904e7
  Jakob Stoklund Olesen authored Sep 29, 2011
```
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.

llvm-svn: 140776
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  dd1904e7
- Target/ARM: Unbreak! CMake! Build! · 15b3c9c6
  NAKAMURA Takumi authored Sep 29, 2011
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llvm-svn: 140774
```
  15b3c9c6
- Delete NEONMoveFix, now unused. · bf64024a
  Jakob Stoklund Olesen authored Sep 29, 2011
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llvm-svn: 140773
```
  bf64024a
- Use ExecutionDepsFix instead of NEONMoveFix. · f7ad1890
  Jakob Stoklund Olesen authored Sep 29, 2011
```
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.

llvm-svn: 140772
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  f7ad1890
- Move to ISelLowering. · a0d5f268
  Bill Wendling authored Sep 29, 2011
```
llvm-svn: 140754
```
  a0d5f268
- PTX: Add new patterns for bitconvert and any_extend · fd47d8af
  Justin Holewinski authored Sep 29, 2011
```
llvm-svn: 140753
```
  fd47d8af
- Revert r140731, "Define classes for unary and binary FP instructions and use them to define" · 67289582
  Jakob Stoklund Olesen authored Sep 28, 2011
```
It broke the unit tests.  Please reapply with tests fixed.

llvm-svn: 140735
```
  67289582
- Tighten a ARM dag combine condition to avoid an identity transformation, which · 8156376a
  Evan Cheng authored Sep 28, 2011
```
ends up introducing a cycle in the DAG.

rdar://10196296

llvm-svn: 140733
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  8156376a
Sep 28, 2011
- Define classes for unary and binary FP instructions and use them to define · 5a1b4a80
  Akira Hatanaka authored Sep 28, 2011
```
multiclasses.

llvm-svn: 140731
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  5a1b4a80
- PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. · 2fb357a5
  Eli Friedman authored Sep 28, 2011
```
llvm-svn: 140723
```
  2fb357a5
- Perform the lowering only if there are invokes. · 315b9573
  Bill Wendling authored Sep 28, 2011
```
llvm-svn: 140719
```
  315b9573
- Ahem...actually *add* the ARMSjLjLowering pass to the pass manager. · dfe5acd3
  Bill Wendling authored Sep 28, 2011
```
llvm-svn: 140718
```
  dfe5acd3
- PTX: Fix alignment logic · 933d5168
  Justin Holewinski authored Sep 28, 2011
```
llvm-svn: 140709
```
  933d5168
- Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. · 6f37b4a5
  Akira Hatanaka authored Sep 28, 2011
```
llvm-svn: 140705
```
  6f37b4a5
- Remove definitions of branch-on-FP-likely instructions. They are deprecated. · edc172d4
  Akira Hatanaka authored Sep 28, 2011
```
llvm-svn: 140704
```
  edc172d4
- Mips64 predicate definitions. Patch by Liu. · c117967b
  Akira Hatanaka authored Sep 28, 2011
```
llvm-svn: 140703
```
  c117967b
- PTX: MC-ize the PTX backend (patch 2 of N) · f3d1d4eb
  Justin Holewinski authored Sep 28, 2011
```
Get rid of some of the no-longer-needed parts of PTXAsmPrinter.

llvm-svn: 140698
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  f3d1d4eb
- PTX: MC-ize the PTX back-end (patch 1 of N) · 5e18b14e
  Justin Holewinski authored Sep 28, 2011
```
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697
```
  5e18b14e
- Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. · 21efa7d6
  James Molloy authored Sep 28, 2011
```
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696
```
  21efa7d6
- PTX: Simplify code. No functionality change. · 8747e3e7
  Benjamin Kramer authored Sep 28, 2011
```
llvm-svn: 140680
```
  8747e3e7