isReg, etc., from isRegister, etc.

llvm-svn: 57006

volatile memory references are safe to move.

llvm-svn: 56948

RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539

any volatile memory references.

llvm-svn: 56528

with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290

llvm-svn: 56194

isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189

representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161

when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698

llvm-svn: 55563

llvm-svn: 55434

llvm-svn: 55430

simplify PseudoSourceValue printing a bit.  Unnest all of PseudoSourceValue.cpp from the llvm namespace.

llvm-svn: 55293

llvm-svn: 55291

alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.

llvm-svn: 55058

llvm-svn: 54807

subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.

llvm-svn: 54781

a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146

in the MachineInstr clone code.

llvm-svn: 53868

llvm-svn: 53779

Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746

llvm-svn: 53680

llvm-svn: 53471

- Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed.
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.

llvm-svn: 53394

parent is non-null. It now always is.

llvm-svn: 53263

llvm-svn: 53262

MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212

#include dependency on Support/MathExtras.h in the header file.

llvm-svn: 53200

- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097

254.gap failure was not due to this mod.

llvm-svn: 53068

llvm-svn: 53050

llvm-svn: 52988

the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943

llvm-svn: 52841

Don't perform expensive queries checking for super and sub registers when we know that there aren't any.
This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s.  Look for more improvements in this area soon!

llvm-svn: 52804

instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.

llvm-svn: 51660

llvm-svn: 50687

llvm-svn: 49783

review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348

llvm-svn: 48577