llvm-svn: 174955

llvm-svn: 174954

llvm-svn: 174953

The bitcode writer emits a reference to the attribute group that the object at
the given index refers to. The bitcode reader is modified to read this in and
map it back to the attribute group.

llvm-svn: 174952

MarkMemberReferenced instead of marking functions referenced directly. An audit
of callers to MarkFunctionReferenced and DiagnoseUseOfDecl also caused a few
other changes:
 * don't mark functions odr-used when considering them for an initialization
   sequence. Do mark them referenced though.
 * the function nominated by the cleanup attribute should be diagnosed.
 * operator new/delete should be diagnosed when building a 'new' expression.

llvm-svn: 174951

llvm-svn: 174950

changing the ClangASTSource to return a bool instead
of returning a list of results.  Our testsuite mostly
works with this change, but some minor issues may
remain both on LLDB's side and on Clang's side.

llvm-svn: 174949

llvm-svn: 174948

up variables in the current stack frame to avoid
mutual recursion between the expression parser
and the synthetic child providers.  Variables
should only be looked up in a very simple way,
using no synthetic anything.

<rdar://problem/13173454>

llvm-svn: 174947

rdar://12046763

llvm-svn: 174946

live range after inserting a copy at the end of a block.

llvm-svn: 174945

llvm-svn: 174944

the linkage of functions and variables while merging declarations from modules,
and we don't necessarily have enough of the rest of the AST loaded at that
point to allow us to compute linkage, so serialize it instead.

llvm-svn: 174943

llvm-svn: 174942

+ added progress information for several checkers

llvm-svn: 174941

calling std::terminate().  rdar://11904428

llvm-svn: 174940

llvm-svn: 174939

particularly useful for catching issues with architectures that have exotic
terminators like MIPS.

llvm-svn: 174938

llvm-svn: 174937

a critical edge.

llvm-svn: 174936

live ranges should always be extended, and the only successor that should be
considered for extension of other ranges is the target of the split edge.

llvm-svn: 174935

Sorry for the lack of a test case.  I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.

I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.

llvm-svn: 174934

A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad
word).

radar://13171406

llvm-svn: 174933

Check for reverse shuffles in the CostModel analysis pass and query
TargetTransform info accordingly. This allows us we can write test cases for
reverse shuffles.

radar://13171406

llvm-svn: 174932

lexical storage but not visible storage' case in C++. It's unclear whether we
even need the special-case handling for C++, since it seems to be working
around our not serializing a lookup table for the TU in C. But in any case,
the assertion is incorrect.

llvm-svn: 174931

expression.

llvm-svn: 174930

Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

llvm-svn: 174929

Patch by Joey Gouly!

llvm-svn: 174928

llvm-svn: 174927

Part of rdar://12470373

llvm-svn: 174926

llvm-svn: 174925

llvm-svn: 174924

llvm-svn: 174923

of immediately afterwards.

llvm-svn: 174922

llvm-svn: 174921

Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920

move-constructors and move-assignment operators, use memcpy to copy adjacent
POD members.

Previously, classes with one or more Non-POD members would fall back on
element-wise copies for all members, including POD members. This often
generated a lot of IR. Without padding metadata, it wasn't often possible
for the LLVM optimizers to turn the element-wise copies into a memcpy.

This code hasn't yet received any serious tuning. I didn't see any serious
regressions on a self-hosted clang build, or any of the nightly tests, but
I think it's important to get this out in the wild to get more testing.
Insights, feedback and comments welcome.

Many thanks to David Blaikie, Richard Smith, and especially John McCall for
their help and feedback on this work.

llvm-svn: 174919

llvm-svn: 174918

llvm-svn: 174916

When building the pairable-instruction dependency map, don't search
past the last pairable instruction. For large blocks that have been
divided into multiple instruction groups, searching past the last
instruction in each group is very wasteful. This gives a 32% speedup
on the csa.ll test case from PR15222 (when using 50 instructions
in each group).

No functionality change intended.

llvm-svn: 174915