This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865

Before I just ported the shell of the pass. I've tried to keep everything
nearly identical to the ARM version. I think it will be very easy to eventually
merge these two and create a new more general pass that other targets can
use. I have some improvements I would like to make to allow pools to 
be shared across functions and some other things. When I'm all done we
can think about making a more general pass. More to be ported but the
basic mechanism works now almost as good as gcc mips16.

llvm-svn: 193509

llvm-svn: 191748

Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

llvm-svn: 184067

operands as the prototype instruction but with a different opcode.

llvm-svn: 181714

llvm-svn: 181713

terminator.

No functionality change.

llvm-svn: 176326

This function will be used later when the capability to search delay slot
filling instructions in successor blocks is added. No intended functionality
changes.

llvm-svn: 176325

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131

immediate operands to be copied.

Patch by Reed Kotler.

llvm-svn: 163811

the temporary register that was used to load the immediate. Currently, it always
returns register $at, but this will change if, in the future, we decide to use 
another register.

No changes in functionality.

llvm-svn: 162417

of MipsTargetMachine.cpp.

llvm-svn: 161191

MipsSERegisterInfo.

llvm-svn: 161092

and MipsSEInstrInfo (for mips32/64).

llvm-svn: 161081

Hello world will compile and execute with this patch.

Patch by Reed Kotler.

llvm-svn: 160651

llvm-svn: 160598

Test case will be added later when long branch patch is checked in.

llvm-svn: 160597

llvm-svn: 159971

llvm-svn: 158471

compute the size of basic blocks in a function. Also, define a function which
emits a series of instructions to load an immediate.

llvm-svn: 158429

It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

llvm-svn: 157703

Delete MipsExpandPseudo.

llvm-svn: 157495

llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.

As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.

Patch by Reed Kotler.

llvm-svn: 156958

Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

llvm-svn: 155188

llvm-svn: 151625

reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register. 

example:

.cpload $25       // set $gp.
...
.cprestore 16     // store $gp to stack slot 16($sp).
...
jalr $25          // function call. clobbers $gp.
lw $gp, 16($sp)   // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25          // function call.
lw $gp, 16($sp)   // not emitted if $gp is not live after this instruction.
...

llvm-svn: 151402

llvm-svn: 150805

needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.

llvm-svn: 149668

loadRegFromStackSlot. 

llvm-svn: 147235

llvm-svn: 146896

-relocation-model=static.

llvm-svn: 146432

llvm-svn: 145912

registers.

llvm-svn: 144017

llvm-svn: 141694

that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.

llvm-svn: 141623

llvm-svn: 141613

llvm-svn: 141476

registers.

llvm-svn: 141019