Commits · 5a56a25b0bd1279c41604a64c6a1bec3815b9b36 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Nov 14, 2019
- Sink all InitializePasses.h includes · 05da2fe5
  Reid Kleckner authored Nov 13, 2019
  05da2fe5
Sep 02, 2019
- [DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations · 22493f66
  Jeremy Morse authored Sep 02, 2019
  22493f66
Aug 15, 2019
- Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM · 0c476111
  Daniel Sanders authored Aug 15, 2019
  0c476111
Aug 07, 2019
- [MachineCSE][NFC] Use 'profitable' rather than 'beneficial' to name method. · 02b8056c
  Kai Luo authored Aug 07, 2019
  02b8056c
Aug 02, 2019
- Finish moving TargetRegisterInfo::isVirtualRegister() and friends to... · 2bea69bf
  Daniel Sanders authored Aug 01, 2019
  2bea69bf
Jul 19, 2019
- [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs. · dec62468
  Kai Luo authored Jul 19, 2019
  dec62468
Jun 12, 2019
- [MIR] Skip hoisting to basic block which may throw exception or return · 339b39b7
  Anton Afanasyev authored Jun 12, 2019
  339b39b7
Jun 09, 2019
- [MIR] Add simple PRE pass to MachineCSE · 623d9ba0
  Anton Afanasyev authored Jun 09, 2019
  623d9ba0
Jun 06, 2019
- Allow target to handle STRICT floating-point nodes · 6c5d5ce5
  Ulrich Weigand authored Jun 05, 2019
  6c5d5ce5
May 27, 2019
- Revert r361356: "[MIR] Add simple PRE pass to MachineCSE" · 0ff41b8a
  David L. Jones authored May 27, 2019
  0ff41b8a
May 22, 2019
- [MIR] Add simple PRE pass to MachineCSE · df00c6a5
  Anton Afanasyev authored May 22, 2019
  df00c6a5
May 03, 2019
- Revert "[MIR] Add simple PRE pass to MachineCSE" · 6d08b8db
  Anton Afanasyev authored May 03, 2019
  6d08b8db
- [MIR] Add simple PRE pass to MachineCSE · 9c20156d
  Anton Afanasyev authored May 03, 2019
  9c20156d
Feb 20, 2019
- [Codegen] Remove dead flags on Physical Defs in machine cse · cb5a48b0
  David Green authored Feb 20, 2019
  cb5a48b0
Jan 19, 2019
- Update the file headers across all of the LLVM projects in the monorepo · 2946cd70
  Chandler Carruth authored Jan 19, 2019
  2946cd70
Oct 20, 2018
- [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again) · 8d6ff4c0
  Roman Tereshin authored Oct 20, 2018
  8d6ff4c0
Oct 01, 2018
- [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal. · 81d8ef21
  Carlos Alberto Enciso authored Oct 01, 2018
  81d8ef21
Aug 30, 2018
- [DWARF] Missing location debug information with -O2. · 06adfa17
  Carlos Alberto Enciso authored Aug 30, 2018
  06adfa17
Jun 12, 2018
- [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs() · b2d3f2e5
  Roman Tereshin authored Jun 12, 2018
  b2d3f2e5
May 14, 2018
- Rename DEBUG macro to LLVM_DEBUG. · d34e60ca
  Nicola Zaghen authored May 14, 2018
  d34e60ca
May 09, 2018
- [DebugInfo] Examine all uses of isDebugValue() for debug instructions. · 801bf7eb
  Shiva Chen authored May 09, 2018
  801bf7eb
May 04, 2018
- [MachineCSE] Rewrite a loop checking if a block is in a set of blocks without using a set. NFC. · 131e7491
  Michael Zolotukhin authored May 04, 2018
  131e7491
Jan 18, 2018
- GlobalISel: Make MachineCSE runnable in the middle of the GlobalISel · a9346e05
  Justin Bogner authored Jan 18, 2018
  a9346e05
Dec 15, 2017
- MachineFunction: Return reference from getFunction(); NFC · f1caa283
  Matthias Braun authored Dec 15, 2017
  f1caa283
Dec 07, 2017
- [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. · a8a83d15
  Francis Visoiu Mistrih authored Dec 07, 2017
  a8a83d15
Nov 28, 2017
- [CodeGen] Print register names in lowercase in both MIR and debug output · 9d7bb0cb
  Francis Visoiu Mistrih authored Nov 28, 2017
  9d7bb0cb
Nov 20, 2017
- [MachineCSE] Add new callback for is caller preserved or constant physregs · f75f4d65
  Tony Jiang authored Nov 20, 2017
  f75f4d65
Nov 17, 2017
- Fix a bunch more layering of CodeGen headers that are in Target · b3bde2ea
  David Blaikie authored Nov 17, 2017
  b3bde2ea
Nov 08, 2017
- Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering · 3f833edc
  David Blaikie authored Nov 08, 2017
  3f833edc
Aug 24, 2017
- [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use... · 5df3d890
  Eugene Zelenko authored Aug 24, 2017
  5df3d890
Jun 06, 2017
- Sort the remaining #include lines in include/... and lib/.... · 6bda14b3
  Chandler Carruth authored Jun 06, 2017
  6bda14b3
May 25, 2017
- CodeGen: Rename DEBUG_TYPE to match passnames · 1527baab
  Matthias Braun authored May 25, 2017
  1527baab
May 24, 2017
- MachineCSE: Respect interblock physreg liveness · 2676f826
  Mikael Holmen authored May 24, 2017
  2676f826
Dec 16, 2016
- [codegen] Add generic functions to skip debug values. · 3c8b8c98
  Florian Hahn authored Dec 16, 2016
  3c8b8c98
Oct 28, 2016
- MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFC · de8c1b34
  Matthias Braun authored Oct 28, 2016
  de8c1b34
Sep 10, 2016
- [CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantLoad. NFC · d98cf00c
  Justin Lebar authored Sep 10, 2016
  d98cf00c
Jun 30, 2016
- CodeGen: Use MachineInstr& in TargetInstrInfo, NFC · 9cfc75c2
  Duncan P. N. Exon Smith authored Jun 30, 2016
  9cfc75c2
Apr 23, 2016
- Re-commit optimization bisect support (r267022) without new pass manager support. · aa641a51
  Andrew Kaylor authored Apr 22, 2016
  aa641a51
Apr 22, 2016
- Revert "Initial implementation of optimization bisect support." · 6013f45f
  Vedant Kumar authored Apr 22, 2016
  6013f45f
Apr 21, 2016
- Initial implementation of optimization bisect support. · f0f27929
  Andrew Kaylor authored Apr 21, 2016
  f0f27929