Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.

llvm-svn: 141353

llvm-svn: 141342

others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.

llvm-svn: 141341

Fix the check for nested IT instructions in the disassembler.  We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.

llvm-svn: 141339

llvm-svn: 141333

llvm-svn: 141327

llvm-svn: 141323

Place the immediate to OR into a register so that it works.

llvm-svn: 141319

* Some code cleanup.

llvm-svn: 141317

llvm-svn: 141306

Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.

llvm-svn: 141274

llvm-svn: 141266

to an infinite loop because of the def-use chains.

Also use a frame load instead of store for the LD instruction.

llvm-svn: 141263

llvm-svn: 141248

merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.

llvm-svn: 141247

number (18) for the proper addressing mode.

llvm-svn: 141245

There are fewer registers with sub_8bit sub-registers in 32-bit mode
than in 64-bit mode.  In 32-bit mode, sub_8bit behaves the same as
sub_8bit_hi.

llvm-svn: 141206

llvm-svn: 141199

llvm-svn: 141197

llvm-svn: 141196

llvm-svn: 141194

llvm-svn: 141190

llvm-svn: 141184

llvm-svn: 141183

llvm-svn: 141182

llvm-svn: 141174

llvm-svn: 141173

it returns false, at least as far as I could tell by reading the code.

llvm-svn: 141172

llvm-svn: 141162

llvm-svn: 141158

llvm-svn: 141157

llvm-svn: 141156

Record the registers used and defined by a call in Filler::insertDefsUses.

llvm-svn: 141154

llvm-svn: 141152

filled the last delay slot visited.

llvm-svn: 141151

Filler::findDelayInstr.

llvm-svn: 141150

instructions (instructions that are not NOP).

llvm-svn: 141149

I->getDesc().hasDelaySlot() does.

llvm-svn: 141148

not have to be set.

llvm-svn: 141147

llvm-svn: 141146