imposes a constraint that GOT16 referring to a local symbol or HI16 has to be
followed immediately by a matching LO16 relocation.

llvm-svn: 153553

llvm-svn: 153502

set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if
MachineOperand MO is of an unexpected type. 

llvm-svn: 153494

offset applied to it.

llvm-svn: 153493

cleared. No functionality change.

llvm-svn: 153491

llvm-svn: 153429

llvm-svn: 153155

These changes allow us to compile big endian from the command line for 32 bit
Mips targets. This patch will result in code and data actually being produced
in the correct endianess.

llvm-svn: 153153

Used to allow context sensitive printing of super-register or sub-register
references.

llvm-svn: 152043

objects for big endian and little endian targets.

Patch by Jack Carter.

llvm-svn: 151788

llvm-svn: 151625

llvm-svn: 151341

llvm-svn: 151340

llvm-svn: 151337

llvm-svn: 150805

llvm-svn: 150775

llvm-svn: 149814

needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.

llvm-svn: 149668

Fixes PR11877

llvm-svn: 149180

Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.

llvm-svn: 148833

llvm-svn: 148578

llvm-svn: 148400

llvm-svn: 147924

llvm-svn: 147133

ELF relocations.

Patch by Jack Carter.

llvm-svn: 147118

avoid including ADT/Triple.h in many places when the target specific bits are
moved.

llvm-svn: 147059

llvm-svn: 147005

llvm-svn: 146960

llvm-svn: 146896

emission is not supported yet, but a patch that adds the support should follow
soon.

llvm-svn: 146572

llvm-svn: 146409

been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.

llvm-svn: 146088

make the addend fixup code a bit more generic

Patch by Jack Carter.

llvm-svn: 145998

llvm-svn: 145910

llvm-svn: 145894

Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

llvm-svn: 145881

llvm-svn: 145420

- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).  

llvm-svn: 145113

llvm-svn: 145112

and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.

llvm-svn: 144788