edges on demand.

llvm-svn: 117982

It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.

llvm-svn: 117981

source, and let rewrite() clean it up.

This way, kill flags on the inserted copies are fixed as well during rewrite().

We can't just assume that all the copies we insert are going to be kills since
critical edges into loop headers sometimes require both source and dest to be
live out of a block.

llvm-svn: 117980

FWIW, X86 has 254 ambiguous instructions.

llvm-svn: 117979

for handling the fixup necessary.

llvm-svn: 117978

llvm-svn: 117977

This is another part of the fix for Radar 8599955.

llvm-svn: 117976

llvm-svn: 117975

llvm-svn: 117974

Encapsulate within CXCursor the notion of whether a VarDecl* is the first Decl in a DeclGroup.  We use this
to recover some context that is currently not modeled directly in the AST.  Currently VarDecl's cannot
properly determine their source range because they have no context on whether or not they appear in a DeclGroup.
For the meantime, this bandaid suffices in libclang since that is where the correct SourceRange is directly needed.

Fixes <rdar://problem/8595749>.

llvm-svn: 117973

statement.  Now when ClangExpressionDeclMap returns
a variable for a name, it pretty-prints that
variable to the log instead of printing a (fairly
useless) NamedDecl pointer.

llvm-svn: 117972

llvm-svn: 117971

declaration names, from Jim Goodnow II!

llvm-svn: 117970

llvm-svn: 117969

llvm-svn: 117968

llvm-svn: 117967

llvm-svn: 117964

llvm-svn: 117963

llvm-svn: 117962

llvm-svn: 117961

At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.

llvm-svn: 117960

llvm-svn: 117959

llvm-svn: 117956

llvm-svn: 117955

llvm-svn: 117954

bits are zero, not that the current low bits are zero.  Fixes <rdar://problem/8606771>.

llvm-svn: 117953

from X86AsmParser.cpp

llvm-svn: 117952

(was project bugs).

llvm-svn: 117951

at more than those which define CPSR. You can have this situation:

(1)  subs  ...
(2)  sub   r6, r5, r4
(3)  movge ...
(4)  cmp   r6, 0
(5)  movge ...

We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:

(1)  sub   r1, r2, r3
(2)  sub   r4, r5, r6
(3)  cmp   r4, ...
(5)  movge ...
(6)  cmp   r1, ...
(7)  movge ...

We cannot convert (1) to "subs" because of the intervening use of CPSR.

llvm-svn: 117950

getsource_if_available(obj) which also handles the exception if it occurs.

llvm-svn: 117949

mismatch: I was using the compile unit user ID (the compile unit offset in
the DWARF) as the compile unit index.

llvm-svn: 117948

and warnings.

llvm-svn: 117947

llvm-svn: 117946

give them individual stack slots once the are actually spilled.

llvm-svn: 117945

When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.

llvm-svn: 117944

Also avoids IRGen crashes due to accepting invalid code.

llvm-svn: 117943

llvm-svn: 117942

llvm-svn: 117941

llvm-svn: 117940

llvm-svn: 117939