- May 28, 2011
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Jakob Stoklund Olesen authored
It is important that this function returns the same number of live blocks as countLiveBlocks(CurLI) because live range splitting uses the number of live blocks to ensure it is making progress. This is in preparation of supporting duplicate UseBlock entries for basic blocks that have a virtual register live-in and live-out, but not live-though. llvm-svn: 132244
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Akira Hatanaka authored
in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a double precision register get saved. llvm-svn: 132243
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Eric Christopher authored
register allocation dependent and will occasionally break. WIP in the register allocator to model paired/etc registers. rdar://9119939 llvm-svn: 132242
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Chad Rosier authored
llvm-svn: 132241
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Akira Hatanaka authored
Need this to prevent emitting illegal conditional move instructions. llvm-svn: 132240
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Devang Patel authored
llvm-svn: 132239
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Rafael Espindola authored
llvm-svn: 132238
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Chad Rosier authored
llvm-svn: 132237
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Rafael Espindola authored
There was no way to check if a given register/mode pair was valid. We now return an error code (-2) instead of asserting. If anyone thinks that an assert at this point is really needed, we can autogen a hasValidDwarfRegNum instead. llvm-svn: 132236
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Cameron Zwarich authored
and add some basic tests for them. llvm-svn: 132235
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Charles Davis authored
the Win64 EH mechanism to implement GCC-style exceptions. LLVM supports hardly anything else at this point! llvm-svn: 132234
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Bruno Cardoso Lopes authored
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode, default to the Thumb 1 versions/encodings. llvm-svn: 132233
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Rafael Espindola authored
llvm-svn: 132230
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Eli Friedman authored
llvm-svn: 132228
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Chad Rosier authored
and enhancements in sub-project status updates. llvm-svn: 132227
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Cameron Zwarich authored
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032. llvm-svn: 132225
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Rafael Espindola authored
subregisters: When a value is in a subregister, at least report the location as being the superregister. We should extend the .td files to encode the bit range so that we can produce a DW_OP_bit_piece. llvm-svn: 132224
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Rafael Espindola authored
llvm-svn: 132222
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- May 27, 2011
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Charles Davis authored
this. XFAIL'd, because the COFF AsmParser can't handle .section yet. llvm-svn: 132220
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Nadav Rotem authored
code in one place. Re-apply 131534 and fix the multi-step promotion of integers. llvm-svn: 132217
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Eli Friedman authored
Attempt to preserve debug line info in LICM; as the comment in the code says, it's hard to pick good line numbers for this transformation, but something is better than nothing. rdar://9143729 llvm-svn: 132215
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Chad Rosier authored
llvm-svn: 132214
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Jakob Stoklund Olesen authored
llvm-svn: 132213
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Chad Rosier authored
llvm-svn: 132212
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Evan Cheng authored
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789 llvm-svn: 132211
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Jakob Stoklund Olesen authored
According to PR2536, the old spiller had trouble with the IMPLICIT_DEF in this code: %reg1028<def> = MOV16rm %reg0, 1, %reg0, <ga:g_5>, Mem:LD(2,2) [g_5 + 0] %reg1039<def> = IMPLICIT_DEF %reg1038<def> = INSERT_SUBREG %reg1039, %reg1028, 2 %reg1025<def> = AND32ri %reg1038, 65534, %%EFLAGS<imp-def> However, today we emit a zero-extending load instead: %vreg10<def> = MOVZX32rm16 %noreg, 1, %noreg, <ga:@g_5>, %noreg; %mem:LD2[@g_5] GR32:%vreg10 %vreg0<def> = AND32ri %vreg10, 65534, %%EFLAGS<imp-def,dead>; %GR32:%vreg0,%vreg10 This makes the test pointless since it no longer creates the spiller hazard. llvm-svn: 132210
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Chad Rosier authored
fixes aliasing issues with the old and new names as well as adds test cases for the auto-upgrader. Fixes rdar 9472944. llvm-svn: 132207
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Devang Patel authored
Keep this simple. Use DIType to get signness and size of a type. Based on size, select appropraite form. llvm-svn: 132206
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Charles Davis authored
suffix (e.g. .xdata$myfunc). The suffix part isn't implemented yet, but I'll get to it in the next patch. Fix up all callers of the affected functions. Make them pass said suffix to the function. llvm-svn: 132205
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Evan Cheng authored
llvm-svn: 132203
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Dan Gohman authored
llvm-svn: 132202
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Eli Friedman authored
Don't sink or hoist debug info instrinsics; it isn't useful. This also prevents LICM sinking from erasing debug intrinsics which don't dominate any exit block of the loop. rdar://9143943 . llvm-svn: 132201
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John McCall authored
- the selector for the landing pad must provide all available information about the handlers, filters, and cleanups within that landing pad - calls to _Unwind_Resume must be converted to branches to the enclosing lpad so as to avoid re-entering the unwinder when the lpad claimed it was going to handle the exception in some way This is quite specific to libUnwind-based unwinding. In an effort to not interfere too badly with other unwinders, and with existing hacks in frontends, this only triggers on _Unwind_Resume (not _Unwind_Resume_or_Rethrow) and does nothing with selectors if it cannot find a selector call for either lpad. llvm-svn: 132200
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Jakob Stoklund Olesen authored
The register allocators know to filter reserved registers from the allocation orders, so we don't need all of this boilerplate. llvm-svn: 132199
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Devang Patel authored
This fixes regressions reported by buildbots as a fallout of r132193. llvm-svn: 132197
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Eli Friedman authored
llvm-svn: 132196
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Eli Friedman authored
llvm-svn: 132195
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Devang Patel authored
llvm-svn: 132193
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Rafael Espindola authored
These should be DW_OP_bit_piece of CR (64). llvm-svn: 132192
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