- Mar 01, 2012
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Akira Hatanaka authored
llvm-svn: 151847
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- Feb 28, 2012
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Jia Liu authored
llvm-svn: 151625
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- Feb 17, 2012
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Akira Hatanaka authored
instructions to be emitted. llvm-svn: 150782
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- Feb 16, 2012
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Akira Hatanaka authored
llvm-svn: 150739
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- Nov 14, 2011
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Akira Hatanaka authored
N32/64 places all variable arguments in integer registers (or on stack), regardless of their types, but follows calling convention of non-vaarg function when it handles fixed arguments. llvm-svn: 144553
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- Nov 12, 2011
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Akira Hatanaka authored
llvm-svn: 144447
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- Sep 23, 2011
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Akira Hatanaka authored
llvm-svn: 140401
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- Jun 21, 2011
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Akira Hatanaka authored
handle functions with return type Complex long long. llvm-svn: 133497
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- Apr 25, 2011
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Duncan Sands authored
llvm-svn: 130120
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- Apr 15, 2011
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Akira Hatanaka authored
llvm-svn: 129612
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Akira Hatanaka authored
Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality. llvm-svn: 129606
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- Mar 04, 2011
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Bruno Cardoso Lopes authored
llvm-svn: 127003
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- Aug 17, 2010
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Chris Lattner authored
llvm-svn: 111241
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- Jan 19, 2010
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Bruno Cardoso Lopes authored
llvm-svn: 93875
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- Mar 19, 2009
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Bruno Cardoso Lopes authored
llvm-svn: 67280
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- Aug 03, 2008
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Bruno Cardoso Lopes authored
llvm-svn: 54312
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- Jul 05, 2008
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Bruno Cardoso Lopes authored
important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
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- Dec 29, 2007
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Chris Lattner authored
llvm-svn: 45418
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- Jun 06, 2007
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Bruno Cardoso Lopes authored
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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