instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.

llvm-svn: 157234

llvm-svn: 156460

Patch by Vladimir Medic. 

llvm-svn: 154935

llvm-svn: 153925

Patch by Vladimir Medic.

llvm-svn: 153924

llvm-svn: 151625

llvm-svn: 150775

-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

llvm-svn: 142378

expanding conditional moves, which is not needed since architectures that lack
support for conditional moves have been removed. 

llvm-svn: 142226

llvm-svn: 142220