llvm-svn: 151625

Implement encoder methods getJumpTargetOpValue and getBranchTargetOpValue
for jmptarget and brtarget Mips tablegen operand types in the code emitter
for old-style JIT. Rename the pc relative relocation for branches - new
name is Mips::reloc_mips_pc16.

Patch by Sasa Stankovic

llvm-svn: 147382

llvm-svn: 141959

Patch by Jack Carter and Reed Kotler at Mips. 

llvm-svn: 141936

Patch by Jack Carter at Mips. 

llvm-svn: 141932

- Add TSFlags for the instruction formats. The idea here is to use
  as much encoding as possible from getBinaryCodeForInstr, and having
  TSFLags formats for that would make it easier to encode most part
  of the instructions (since Mips encodings are pretty straightforward)
- Improve the mips mechanism for compilation callback
- Add Mips specific code for invalidating the instruction cache
- Next patch will address wrong tablegen encoding

Commit msg added by my own but the patch is from Sasa Stankovic.

llvm-svn: 139688

Stefanovic. I removed the part that actually emits the instructions cause
I want that to get in better shape first and in incremental steps. This
also makes it easier to review the upcoming parts.

llvm-svn: 135678

llvm-svn: 45418

by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447

llvm-svn: 22543

llvm-svn: 22500

llvm-svn: 21408

this header file is born.

llvm-svn: 13176

llvm-svn: 10727

llvm-svn: 9903

llvm-svn: 9321

llvm-svn: 4788