llvm-svn: 158471

llvm-svn: 158250

Add the MCRegisterInfo to the factories and constructors.

Patch by Tom Stellard <Tom.Stellard@amd.com>.

llvm-svn: 156828

llvm-svn: 155307

Patch by Vladimir Medic. 

llvm-svn: 154935

llvm-svn: 154838

llvm-svn: 153925

Patch by Vladimir Medic.

llvm-svn: 153924

This patch allows llvm to recognize that a 64 bit object file is being produced
and that the subsequently generated ELF header has the correct information.

The test case checks for both big and little endian flavors.

Patch by Jack Carter.

llvm-svn: 153889

Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo.

llvm-svn: 153860

llvm-svn: 153795

imposes a constraint that GOT16 referring to a local symbol or HI16 has to be
followed immediately by a matching LO16 relocation.

llvm-svn: 153553

llvm-svn: 153502

set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if
MachineOperand MO is of an unexpected type. 

llvm-svn: 153494

offset applied to it.

llvm-svn: 153493

cleared. No functionality change.

llvm-svn: 153491

llvm-svn: 153429

llvm-svn: 153155

These changes allow us to compile big endian from the command line for 32 bit
Mips targets. This patch will result in code and data actually being produced
in the correct endianess.

llvm-svn: 153153

Used to allow context sensitive printing of super-register or sub-register
references.

llvm-svn: 152043

objects for big endian and little endian targets.

Patch by Jack Carter.

llvm-svn: 151788

llvm-svn: 151625

llvm-svn: 151341

llvm-svn: 151340

llvm-svn: 151337

llvm-svn: 150805

llvm-svn: 150775

llvm-svn: 149814

needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.

llvm-svn: 149668

Fixes PR11877

llvm-svn: 149180

Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.

llvm-svn: 148833

llvm-svn: 148578

llvm-svn: 148400

llvm-svn: 147924

llvm-svn: 147133

ELF relocations.

Patch by Jack Carter.

llvm-svn: 147118

avoid including ADT/Triple.h in many places when the target specific bits are
moved.

llvm-svn: 147059

llvm-svn: 147005

llvm-svn: 146960

llvm-svn: 146896