llvm-svn: 106677

llvm-svn: 106672

llvm-svn: 106671

Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.

llvm-svn: 106634

to using that.

llvm-svn: 106633

llvm-svn: 106621

Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.

Conflicts:

	lib/CodeGen/MachineSink.cpp

llvm-svn: 106614

llvm-svn: 106600

testcases this time.

llvm-svn: 106593

llvm-svn: 106588

llvm-svn: 106586

llvm-svn: 106574

llvm-svn: 106557

llvm-svn: 106556

llvm-svn: 106542

llvm-svn: 106499

llvm-svn: 106486

llvm-svn: 106482

Move part of SSE 1 & 2 compare, shuffle and unpack instructions closely. Preparing them for refactoring and to the addition of their AVX forms

llvm-svn: 106437

Add AVX regular (non-aliased ones) and,or,xor,andn packed instructions. They are already tested in the MC framework, no test needed

llvm-svn: 106436

Based on a patch by Patrick Marlier!

llvm-svn: 106433

I was trying to do some refactoring on the copyRegToReg, but this is realyl a work in progress and not generally useful yet.

llvm-svn: 106413

llvm-svn: 106408

llvm-svn: 106405

llvm-svn: 106375

AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.

llvm-svn: 106374

llvm-svn: 106372

llvm-svn: 106371

llvm-svn: 106370

and operand renaming to help.

The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.

llvm-svn: 106367

llvm-svn: 106366

llvm-svn: 106365

segment prefixes.  Daniel wrote most of this patch.

llvm-svn: 106364

llvm-svn: 106361

llvm-svn: 106359

llvm-svn: 106358

llvm-svn: 106357

llvm-svn: 106356

on calls and similar instructions.

llvm-svn: 106353

llvm-svn: 106349