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  1. Jul 21, 2012
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  4. Jul 18, 2012
    • Manman Ren's avatar
      X86: remove redundant cmp against zero. · d0a4ee84
      Manman Ren authored
      Updated OptimizeCompare in peephole to remove redundant cmp against zero.
      We only remove Compare if CF and OF are not used.
      
      rdar://11855129
      
      llvm-svn: 160454
      d0a4ee84
    • Preston Gurd's avatar
      This patch fixes 8 out of 20 unexpected failures in "make check" · f0a48ec8
      Preston Gurd authored
      when run on an Intel Atom processor. The failures have arisen due
      to changes elsewhere in the trunk over the past 8 weeks or so.
      
      These failures were not detected by the Atom buildbot because the
      CPU on the Atom buildbot was not being detected as an Atom CPU.
      The fix for this problem is in Host.cpp and X86Subtarget.cpp, but
      shall remain commented out until the current set of Atom test failures
      are fixed.
      
      Patch by Andy Zhang and Tyler Nowicki!
      
      llvm-svn: 160451
      f0a48ec8
    • Victor Oliveira's avatar
      Adding some debug information to PassManager · aa9ccee9
      Victor Oliveira authored
      llvm-svn: 160446
      aa9ccee9
    • Chad Rosier's avatar
      Whitespace. · 848094e3
      Chad Rosier authored
      llvm-svn: 160445
      848094e3
    • Chandler Carruth's avatar
      Fix a somewhat nasty crasher in PR13378. This crashes inside of · 985454e0
      Chandler Carruth authored
      LiveIntervals due to the two-addr pass generating bogus MI code.
      
      The crux of the issue was a loop nesting problem. The intent of the code
      which attempts to transform instructions before converting them to
      two-addr form is to defer and reprocess any transformed instructions as
      the second processing is likely to have more opportunities to coalesce
      copies, etc. Unfortunately, there was one section of processing that was
      not deferred -- the INSERT_SUBREG rewriting. Due to quirks of how this
      rewriting proceeded, not only did it occur early, it removed the bits of
      information needed for the deferred processing to correctly generate the
      necessary two address form (specifically inserting a copy), but didn't
      trigger any immediate assertions and produced what appeared to be
      already valid two-address from code. Thus, the assertion only fired much
      later in the pipeline.
      
      The fix is to hoist the transformation logic up layer to where it can
      more firmly defer all further processing, and to teach the normal
      processing to handle an edge case previously handled as part of the
      transformation logic. This edge case (already matched tied register
      operands) needs to *not* defer any steps.
      
      As has been brought up repeatedly in the process: wow does this code
      need refactoring. I *may* squeeze in some time to at least bring sanity
      to this loop... but wow... =]
      
      Thanks to Jakob for helpful hints on the way here, and the review.
      
      llvm-svn: 160443
      985454e0
    • Andrew Trick's avatar
      Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings. · a22cdb71
      Andrew Trick authored
      Based on Evan's suggestion without a commitable test.
      
      llvm-svn: 160441
      a22cdb71
    • Andrew Trick's avatar
      whitespace · bc325168
      Andrew Trick authored
      llvm-svn: 160440
      bc325168
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