llvm-svn: 12010

llvm-svn: 12009

llvm-svn: 12007

llvm-svn: 12003

llvm-svn: 12002

llvm-svn: 12001

llvm-svn: 11986

llvm-svn: 11977

llvm-svn: 11898

that they are as far away from the loads as possible.

llvm-svn: 11895

MRegisterInfo::isPhysicalRegister().

llvm-svn: 11894

llvm-svn: 11892

MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.

llvm-svn: 11882

llvm-svn: 11868

MRegisterInfo::is{Physical,Virtual}Register.

llvm-svn: 11849

llvm-svn: 11844

llvm-svn: 11841

to objects.

llvm-svn: 11840

llvm-svn: 11830

llvm-svn: 11804

allocator.

The implementation is completely rewritten and now employs several
optimizations not exercised before. For example for 164.gzip we have
997 loads and 699 stores vs the 1221 loads and 880 stores we have
before.

llvm-svn: 11798

register mapping or a stack slot mapping.

llvm-svn: 11795

llvm-svn: 11782

llvm-svn: 11781

251 (providing a generic machine code rewriter/spiller).

llvm-svn: 11780

llvm-svn: 11759

llvm-svn: 11758

llvm-svn: 11757

llvm-svn: 11756

llvm-svn: 11755

block into MachineBasicBlock::getFirstTerminator().

This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).

llvm-svn: 11748

Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr

llvm-svn: 11738

Simplify iterator usage now that we have next(). Also don't pass iterators by reference now that MachineInstr* are in an ilist

llvm-svn: 11732

llvm-svn: 11724

Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be consistent with the other two

llvm-svn: 11723

llvm-svn: 11721

llvm-svn: 11720

llvm-svn: 11719

llvm-svn: 11716

one terminator instruction in each basic block.

llvm-svn: 11714