This helps hiding the LiveRange class which really should be private.

llvm-svn: 116244

LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210

it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190

truncate the stack pointer to 32-bits on a 64-bit machine.

llvm-svn: 116169

llvm-svn: 116156

functions: computeRemainder and rewrite.

When the remainder breaks up into multiple components, remember to rewrite those
uses as well.

llvm-svn: 116121

llvm-svn: 116119

are still way too long, but it's a start.

No functional change intended.

llvm-svn: 116116

Such a check does not make any sense in presense of inlining and other compiler-dependent stuff.
This should fix bunch of warnings on mingw32.

llvm-svn: 116113

llvm-svn: 116105

are easier to diff with those produced by llvm-mc.

llvm-svn: 116095

llvm-svn: 116081

implicit. e.g.
%D6<def>, %D7<def> = VLD1q16 %R2<kill>, 0, ..., %Q3<imp-def>                                                                                                                                                                              
%Q1<def> = VMULv8i16 %Q1<kill>, %Q3<kill>, ...

The real definition indices are 0,1.

llvm-svn: 116080

llvm-svn: 116061

connected components. These components should be allocated different virtual
registers because there is no reason for them to be allocated together.

Add the ConnectedVNInfoEqClasses class to calculate the connected components,
and move values to new LiveIntervals.

Use it from SplitKit::rewrite by creating new virtual registers for the
components.

llvm-svn: 116006

llvm-svn: 115996

llvm-svn: 115988

llvm-svn: 115951

llvm-svn: 115950

llvm-svn: 115949

do one find().

llvm-svn: 115929

llvm-svn: 115928

This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875

llvm-svn: 115874

llvm-svn: 115835

llvm-svn: 115833

llvm-svn: 115802

llvm-svn: 115792

  allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755

llvm-svn: 115710

reusable, but that is no longer relevant since a split will always replace the
original.

llvm-svn: 115709

llvm-svn: 115708

llvm-svn: 115696

never kept after splitting.

Keeping the original interval made sense when the split region doesn't modify
the register, and the original is spilled. We can get the same effect by
detecting reloaded values when spilling around copies.

llvm-svn: 115695

llvm-svn: 115694

erasing it from the visited set. That ensures we create the right phi defs.

llvm-svn: 115666

Insert copy after defining instruction.

Fix LiveIntervalMap::extendTo to properly handle live segments starting before
the current basic block.

Make sure the open live range is extended to the inserted copy's use slot.

llvm-svn: 115665

llvm-svn: 115650

llvm-svn: 115649

Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.

llvm-svn: 115634