add/sub instructions.

llvm-svn: 151415

reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register. 

example:

.cpload $25       // set $gp.
...
.cprestore 16     // store $gp to stack slot 16($sp).
...
jalr $25          // function call. clobbers $gp.
lw $gp, 16($sp)   // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25          // function call.
lw $gp, 16($sp)   // not emitted if $gp is not live after this instruction.
...

llvm-svn: 151402

llvm-svn: 151398

llvm-svn: 151396

llvm-svn: 151385

llvm-svn: 151384

fix PR12075, a regression in a recent transform I added.  In unreachable code, gep chains can be infinite.  Just like "stripPointerCasts", use a set to keep track of visited instructions so we don't recurse infinitely.

llvm-svn: 151383

used by the Win32 _ftol2 runtime function. Patch by Joe Groff!

llvm-svn: 151382

This will limit all register classes to N registers in order to stress
test register allocation.

llvm-svn: 151379

llvm-svn: 151374

This is necessary to support the existing ppc lowering code for indirect calls.
Fixes PR12071.

llvm-svn: 151373

llvm-svn: 151365

llvm-svn: 151364

Patch by Ahmed Charles

llvm-svn: 151360

of the StringRef.Split2 unittest on 32 bit machines.

llvm-svn: 151358

llvm-svn: 151355

llvm-svn: 151348

Add support for a missed case when the symbols in a difference
expression are in the same section but not the same fragment.

rdar://10924681

llvm-svn: 151345

Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics

llvm-svn: 151342

llvm-svn: 151341

llvm-svn: 151340

llvm-svn: 151339

llvm-svn: 151337

variable declaration as an argument because we want that address
anyhow for our debug information.

This seems to fix rdar://9965111, at least we have more debug
information than before and from reading the assembly it appears
to be the correct location.

llvm-svn: 151335

llvm-svn: 151334

llvm-svn: 151332

I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.

This patch does cause some assembly changes.  Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected.  MachineCopyPropagation may sometimes
leave a dead copy behind.

llvm-svn: 151331

llvm-svn: 151318

The tied source operand of tMUL is the second source operand, not the
first like every other two-address thumb instruction. Special case it
in the size reduction pass to make sure we create the tMUL instruction
properly.

llvm-svn: 151315

EE/Interpreter/ExternalFunctions.cpp: Staticize lle_X_() entries. They can be mapped in FuncNames[] at the initialization.

llvm-svn: 151313

EE/Interpreter/ExternalFunctions.cpp: Prune "C" linkage to suppress warnings with -Wreturn-type (and MSC's w4190).

In historical reason, Interpreter's external entries had prefix "lle_X_" as C linkage, even for well-known entries in EE/Interpreter.
Now, at least on ToT, they are resolved via FuncNames[] mapper.
We will not need their symbols are expected to be exported any more.

Clang r150128 has introduced the warning <"%0 has C-linkage specified, but returns user-defined type %1 which is incompatible with C">.

llvm-svn: 151312

bits of the value carying the boolean condition, as their contents
are undefined. This fixes rdar://10887484.

llvm-svn: 151310

asm.
<rdar://problem/10106006>

llvm-svn: 151303

llvm-svn: 151289

It's is a bit annoying, we should hide this implementation detail better.

llvm-svn: 151284

llvm-svn: 151278

llvm-svn: 151274

Rename it to LiveRegs to make it more clear what's stored inside.

llvm-svn: 151273

Assuming that a single std::set node adds 3 control words, a bitvector
can store (3*8+4)*8=224 registers in the allocated memory of a single
element in the std::set (x86_64). Also we don't have to call malloc
for every register added.

llvm-svn: 151269

rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166

llvm-svn: 151267