llvm-svn: 72774

Please correct the documentation if I missed anything.

llvm-svn: 72773

llvm-svn: 72771

this function" when using a not-too-smart compiler.

llvm-svn: 72768

llvm-svn: 72767

llvm-svn: 72762

Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.

llvm-svn: 72758

llvm-svn: 72757

llvm-svn: 72756

If there is a def of a super-register followed by a use of a sub-register, do *not* add an implicit def of the sub-register. e.g.
EAX = ..., AX<imp-def>
...
    = AX

This creates a double-def. Apparently this used to be necessary but is no longer needed.

Thanks to Anton for pointing this out. Anton, I cannot create a test case without your uncommitted ARM patches. Please check in a test case for me.

llvm-svn: 72755

one new .cpp file, in preparation for merging in the Direct Object Emission
changes we're working on. No functional changes.
Fixed coding style issues on the original patch. Patch by Aaron Gray

llvm-svn: 72754

relocation model on x86-64. Higher level logic should override
the relocation model to PIC on x86_64-apple-darwin.

llvm-svn: 72746

pointer, now that ConstantFoldConstantExpression can
accept a null TargetData pointer.

llvm-svn: 72744

TargetData pointer. The only thing it's used for are
calls to ConstantFoldCompareInstOperands and
ConstantFoldInstOperands, which both already accept a
null TargetData pointer. This makes
ConstantFoldConstantExpression easier to use in clients
where TargetData is optional.

llvm-svn: 72741

llvm-svn: 72740

addresses, involving Base values which do not have Pointer type.
This fixes PR4297.

llvm-svn: 72739

 - Unless I'm mistaken, these results weren't even being reported and just
   served to clobber the previous build products and waste cycles.

llvm-svn: 72738

llvm-svn: 72736

llvm-svn: 72735

llvm-svn: 72734

llvm-svn: 72732

llvm-svn: 72731

llvm-svn: 72729

llvm-svn: 72712

Avoid infinite looping in AllGlobalLoadUsesSimpleEnoughForHeapSRA(). This can happen when PHI uses are recursively dependent on each other.

llvm-svn: 72710

llvm-svn: 72709

llvm-svn: 72708

ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.

llvm-svn: 72707

llvm-svn: 72706

llvm-svn: 72705

as necessary.

llvm-svn: 72702

Parse __OBJC data structures and synthesize magic .objc_ symbols.
Also, alter mangler so that objc method names are readable.

llvm-svn: 72700

llvm-svn: 72699

llvm-svn: 72698

llvm-svn: 72697

llvm-svn: 72696

RewriteStoreUserOfWholeAlloca deal with tail padding because 
isSafeUseOfBitCastedAllocation expects them to.  Otherwise, we crash 
trying to erase the bitcast.

llvm-svn: 72688

metadata references non-Constant values such as instructions.

llvm-svn: 72685

llvm-svn: 72684

llvm-svn: 72668