llvm-svn: 23839

that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835

the pair of elements is a legal type.

llvm-svn: 23804

allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802

sized stack object if either the array size or the type size is zero.

llvm-svn: 23801

llvm-svn: 23797

a lot throughout many programs.  In particular, specfp triggers it a bunch for
constant FP nodes when you have code like  cond ? 1.0 : -1.0.

If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:

%X = external global int
%Y = external global int
int* %test4(bool %C) {
        %G = select bool %C, int* %X, int* %Y
        ret int* %G
}

Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.

Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.

llvm-svn: 23781

llvm-svn: 23777

llvm-svn: 23776

llvm-svn: 23774

llvm-svn: 23764

llvm-svn: 23756

llvm-svn: 23755

fixes a legalize failure on SPASS for itanium.

llvm-svn: 23747

popping up in Fourinarow.

llvm-svn: 23722

you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!

llvm-svn: 23720

llvm-svn: 23718

llvm-svn: 23717

is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.

llvm-svn: 23716

llvm-svn: 23715

the remainder of the failures introduced by my patch last night.

llvm-svn: 23714

tests.

llvm-svn: 23713

parts. This should fix the crafty and signed long long unit test failure
on x86 last night.

llvm-svn: 23711

minimize unnecessary spilling.

llvm-svn: 23710

Kill some dead code.

llvm-svn: 23706

out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.

Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.

llvm-svn: 23704

like turning:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

into
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr

Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.

llvm-svn: 23703

llvm-svn: 23702

llvm-svn: 23700

llvm-svn: 23694

llvm-svn: 23693

llvm-svn: 23692

location, replace them with a new store of the last value.  This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%

llvm-svn: 23691

multiple results.

Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll.  Though this is the most simple case and
can be extended in the future, it is still useful.  For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:

        stw r6, lo16(l5_end_of_array)(r2)
        addi r2, r5, -4
        stwx r5, r4, r2
-       lwzx r5, r4, r2
-       rlwinm r5, r5, 0, 0, 30
        stwx r5, r4, r2
        lwz r2, -4(r4)
        ori r2, r2, 1

llvm-svn: 23690

sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.

llvm-svn: 23688

llvm-svn: 23686

llvm-svn: 23685

llvm-svn: 23684

removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.

llvm-svn: 23682

llvm-svn: 23679