Commits · 65c0805be523445d7ad0f12e90f53648e1ae9f84 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Jan 14, 2020
- [InstCombine] Fix infinite loop due to bitcast <-> phi transforms · 65c0805b
  Nikita Popov authored Jan 13, 2020
  65c0805b
- [InstCombine] Fix user iterator invalidation in bitcast of phi transform · 652cd7c1
  Nikita Popov authored Jan 13, 2020
  652cd7c1
- [InstCombine] Add test for iterator invalidation bug; NFC · fa632340
  Nikita Popov authored Jan 13, 2020
  
  fa632340
- [InstCombine] add test for possible cast-of-select transform; NFC · 57cb4685
  Sanjay Patel authored Jan 14, 2020
  
  57cb4685
- [MachineScheduler] Reduce reordering due to mem op clustering · b777e551
  Jay Foad authored Jan 14, 2020
  b777e551
- [RISCV] Allow shrink wrapping for RISC-V · cd800f3b
  lewis-revill authored Jan 14, 2020
  cd800f3b
- [ThinLTO/WPD] Remove an overly-aggressive assert · 2cefb939
  Teresa Johnson authored Jan 13, 2020
  2cefb939
- [ThinLTO] Handle variable with twice promoted name (Rust) · 7dc4bbf8
  Teresa Johnson authored Jan 14, 2020
  7dc4bbf8
- [X86] Directly emit a BROADCAST_LOAD from constant pool in... · 98c54fb1
  Craig Topper authored Jan 14, 2020
  98c54fb1
- [AIX][XCOFF] Supporting the ReadOnlyWithRel SectionKnd · eb23cc13
  diggerlin authored Jan 14, 2020
  eb23cc13
- [InstCombine] Let combineLoadToNewType preserve ABI alignment of the load (PR44543) · 3e32b7e1
  Juneyoung Lee authored Jan 15, 2020
  3e32b7e1
- [test] Make data layout of load-bitcast64.ll explicit, use update_test_checks.py · 0877843d
  Juneyoung Lee authored Jan 15, 2020
  
  0877843d
- [ARM][MVE] VTP Block Pass fix · a08c0ade
  Sjoerd Meijer authored Jan 14, 2020
  a08c0ade
- [DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour Tests. · e7b2d9f4
  Tom Weaver authored Jan 14, 2020
  e7b2d9f4
- Revert "[DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour Tests." · b10f6b71
  Tom Weaver authored Jan 14, 2020
  b10f6b71
- [AArch64] Fix save register pairing for Windows AAPCS · 1cc8fff4
  Sanne Wouda authored Jan 14, 2020
  1cc8fff4
- [DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour Tests. · 35787e3a
  Tom Weaver authored Jan 14, 2020
  35787e3a
- [AIX] ExternalSymbolSDNode lowering · 25a8aec7
  Xiangling Liao authored Jan 07, 2020
  25a8aec7
- [llvm-readobj][llvm-readelf][test] - Add a few more dynamic section tests. · e1f524ea
  Georgii Rymar authored Dec 26, 2019
  e1f524ea
- AArch64: fix bitcode upgrade of @llvm.neon.addp. · 77cc690b
  Tim Northover authored Jan 09, 2020
  77cc690b
- [InstSimplify] add tests for vector select; NFC · cfe2fab7
  Sanjay Patel authored Jan 14, 2020
  
  cfe2fab7
- [FPEnv] Fix chain handling regression after 04a86966 · 81ee4844
  Ulrich Weigand authored Jan 14, 2020
  81ee4844
- [ARM][LowOverheadLoops] Allow all MVE instrs. · e27632c3
  Sam Parker authored Jan 14, 2020
  e27632c3
- [SelectionDAG] ComputeKnownBits - merge getValidMinimumShiftAmountConstant()... · c05a1110
  Simon Pilgrim authored Jan 14, 2020
  c05a1110
- [ARM][LowOverheadLoops] Change predicate inspection · bad6032b
  Sam Parker authored Jan 10, 2020
  bad6032b
- [ARM][Thumb2] Fix ADD/SUB invalid writes to SP · d94d079a
  Diogo Sampaio authored Jan 13, 2020
  d94d079a
- [X86][SSE] Add add(shl(and(x,c1),c2),c3) test case with non-uniform shift value · fd42a4ac
  Simon Pilgrim authored Jan 14, 2020
  fd42a4ac
- [SelectionDAG] ComputeKnownBits - merge getValidMinimumShiftAmountConstant()... · a43b0065
  Simon Pilgrim authored Jan 14, 2020
  a43b0065
- [ARM][MVE] Disallow VPSEL for tail predication · e73b20c5
  Sam Parker authored Jan 14, 2020
  e73b20c5
- [ARM][MVE] Masked gathers from base + vector of offsets · 72ca86fd
  Anna Welker authored Jan 14, 2020
  72ca86fd
- [TableGen] Introduce an if/then/else statement. · ddbc0b1e
  Simon Tatham authored Jan 14, 2020
  ddbc0b1e
- [TableGen] Introduce a `defvar` statement. · 3388b0f5
  Simon Tatham authored Jan 14, 2020
  3388b0f5
- [llvm-readobj][test] - Fix grammar in comments. · ec6579fc
  Georgii Rymar authored Jan 14, 2020
  ec6579fc
- [AMDGPU] Model distance to instruction in bundle · ad741853
  Stanislav Mekhanoshin authored Jan 13, 2020
  ad741853
- [AMDGPU] Fix getInstrLatency() always returning 1 · eca44745
  Stanislav Mekhanoshin authored Jan 13, 2020
  eca44745
- [AMDGPU] Remove duplicate gfx10 assembler and disassembler tests · 440ce516
  Jay Foad authored Jan 13, 2020
  440ce516
- [AMDGPU] Improve error checking in gfx10 assembler tests · 0950de26
  Jay Foad authored Jan 13, 2020
  0950de26
- [AMDGPU] Add gfx9 assembler and disassembler test cases · 63c3691f
  Jay Foad authored Jan 12, 2020
  63c3691f
- [MC] Don't resolve relocations referencing STB_LOCAL STT_GNU_IFUNC · 0136f226
  Fangrui Song authored Jan 13, 2020
  
  0136f226
- [PowerPC] [NFC] set instruction number as 1st priority of lsr cost model. · 671544c2
  Zheng Chen authored Jan 14, 2020
  
  671544c2