llvm-svn: 140291

Turns out that Thumb2 ADR doesn't need special printing like LDR does.  Fix other test failures I caused.

llvm-svn: 140284

Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123.

llvm-svn: 140283

Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.

llvm-svn: 140282

llvm-svn: 140281

This makes sure that the unwind destination of an invoke is a landing pad.

llvm-svn: 140280

This reduces memory usage as we don't add the same symbol multiple times anymore.

llvm-svn: 140278

This inserts a cleanup landingpad instruction and a resume to mimic the old
unwind instruction.

llvm-svn: 140277

Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.

llvm-svn: 140276

llvm-svn: 140275

patch contributed by Jia Liu!

llvm-svn: 140273

llvm-svn: 140269

These do not need to be conditional on the presence of CommentStream, as they have a fallback path now.

llvm-svn: 140267

llvm-svn: 140266

output.

llvm-svn: 140263

MipsArchVersion needs to be initialized to Mips32.

llvm-svn: 140261

llvm-svn: 140260

llvm-svn: 140258

llvm-svn: 140257

should be initialized to UnknownABI.

llvm-svn: 140254

Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.

llvm-svn: 140249

Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995.

llvm-svn: 140246

llvm-svn: 140237

llvm-svn: 140235

  assert(!"error message");

To:

  assert(0 && "error message");

which is more consistant across the code base.

llvm-svn: 140234

llvm-svn: 140233

Check if architecture & ABI combination is valid.

llvm-svn: 140230

llvm-svn: 140229

This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.

llvm-svn: 140228

llvm-svn: 140227

MachO-only at the moment, sorry.

Usage:
$ llvm-objdump -d -m -g -dsym=a.out.dSYM/Contents/Resources/DWARF/a.out a.out
_main:
100000e90:	55	pushq %rbp	## test.c:11:3
…

llvm-svn: 140224

llvm-svn: 140223

script. Only the testsuite project needs to know this information.

llvm-svn: 140220

In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.

llvm-svn: 140217

here anymore and has been migrated to the test-suite project.

llvm-svn: 140216

llvm-svn: 140214

llvm-svn: 140213

Make sure IPSCCP never marks a tracked call as overdefined in SCCPSolver::ResolvedUndefsIn.  If we do, we can end up in a situation where a function is resolved to return a constant, but the caller is marked overdefined, which confuses the code later.

<rdar://problem/9956541> (again).

llvm-svn: 140210

subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.

llvm-svn: 140204

llvm-svn: 140203