Commits · 6a83350bee20c6f42b3cb1118d47f803cc5e3f55 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Feb 11, 2016
- [X86] New pass to change byte and word instructions to zero-extending versions. · 6a83350b
  Kevin B. Smith authored Feb 11, 2016
  6a83350b
- [NVPTX] emit .file directives for files referenced by subprograms. · a8455f2e
  Artem Belevich authored Feb 11, 2016
  a8455f2e
- Revert r260507: "[X86] Enable the LEA optimization pass by default." · 75fab7b0
  Hans Wennborg authored Feb 11, 2016
  75fab7b0
- [AArch64] Improve load/store optimizer to handle LDUR + LDR. · 00f9d23f
  Chad Rosier authored Feb 11, 2016
  00f9d23f
- [X86] Enable the LEA optimization pass by default. · 193956e2
  Andrey Turetskiy authored Feb 11, 2016
  193956e2
- [MC][ELF] Handle MIPS specific .sdata and .sbss directives · be186204
  Simon Atanasyan authored Feb 11, 2016
  be186204
- AMDGPU: Fix constant bus use check with subregisters · fcb345f1
  Matt Arsenault authored Feb 11, 2016
  fcb345f1
- AMDGPU: Remove some old intrinsic uses from tests · 9c47dd58
  Matt Arsenault authored Feb 11, 2016
  9c47dd58
Feb 10, 2016
- AMDGPU: Release the scavenged offset register during VGPR spill · d791bd07
  Nicolai Haehnle authored Feb 10, 2016
  d791bd07
- [WebAssembly] Switch varags calling convention to use a register · 27501e20
  Derek Schuff authored Feb 10, 2016
  27501e20
- [X86] Fix stack alignment for MCU target, by Anton Nadolskiy. · 2396c38a
  Andrey Turetskiy authored Feb 10, 2016
  2396c38a
- [x86] convert masked load of exactly one element to scalar load · c7dde5f5
  Sanjay Patel authored Feb 09, 2016
  c7dde5f5
Feb 09, 2016
- [AArch64] AArch64LoadStoreOptimizer: fix bug in pre-inc check iterator · 173b14db
  Geoff Berry authored Feb 09, 2016
  173b14db
- [X86][AVX2] Fix SIGN_EXTEND vector handling on AVX2 targets. · 7e671e06
  Simon Pilgrim authored Feb 09, 2016
  7e671e06
- [X86][SSE1] Add MOVLHPS/MOVHLPS lowering and memory folding support · a207436b
  Simon Pilgrim authored Feb 08, 2016
  a207436b
Feb 08, 2016
- [regalloc][WinEH] Do not mark intervals as not spillable if they contain a regmask · 1224488e
  Andrew Kaylor authored Feb 08, 2016
  1224488e
- [WebAssembly] Update the br_if instructions' operand orders to match the spec. · 06b49582
  Dan Gohman authored Feb 08, 2016
  06b49582
- [x86] convert masked store of one element to scalar store · 264d7e5b
  Sanjay Patel authored Feb 08, 2016
  264d7e5b
- Add triple to h-registers-3.ll to make bots happy after r260133 · 303d3dd1
  Hans Wennborg authored Feb 08, 2016
  303d3dd1
- [X86] Don't zero/sign-extend i1, i8, or i16 return values to 32 bits (PR22532) · 850ec6ca
  Hans Wennborg authored Feb 08, 2016
  850ec6ca
- AArch64: match correct order in subtraction pattern. · e316f762
  Tim Northover authored Feb 08, 2016
  e316f762
- AMDGPU: Remove bfi and bfm intrinsics · 92edab2d
  Matt Arsenault authored Feb 08, 2016
  92edab2d
- SelectionDAG: Lower some range metadata to AssertZext · 2bba7792
  Matt Arsenault authored Feb 08, 2016
  2bba7792
- [AVX512][PROLQ][PROLD] Change imm8 to int · 529c27f4
  Michael Zuckerman authored Feb 08, 2016
  529c27f4
- [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461. · 3bb3f73b
  Craig Topper authored Feb 08, 2016
  3bb3f73b
Feb 07, 2016
- [X86][SSE] Resolve target shuffle inputs to sentinels to permit more combines · f116e4ac
  Simon Pilgrim authored Feb 07, 2016
  f116e4ac
- [X86][SSE] Regenerate PSHUFB shuffle mask comments tests · a8d76d87
  Simon Pilgrim authored Feb 07, 2016
  a8d76d87
- [X86][SSE] Added support for MOVHPD/MOVLPD + MOVHPS/MOVLPS shuffle decoding. · a3d67447
  Simon Pilgrim authored Feb 07, 2016
  a3d67447
- [X86][AVX512] add intrinsics of Scalar FP to integer conversion with rounding mode · ad5c3fc4
  Asaf Badouh authored Feb 07, 2016
  ad5c3fc4
- AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation. · 0aeda374
  Igor Breger authored Feb 07, 2016
  0aeda374
Feb 06, 2016
- [X86][AVX2] Regenerated broadcast domain tests · 4108368a
  Simon Pilgrim authored Feb 06, 2016
  4108368a
- [X86][SSE] Add tests for MOVHLPS/MOVLHPS shuffle lowering. · 672808a8
  Simon Pilgrim authored Feb 06, 2016
  672808a8
- [X86][AVX512] Added support for VPMOVZX shuffle decoding. · 0acc32a3
  Simon Pilgrim authored Feb 06, 2016
  0acc32a3
- [X86][AVX512] Fixed prefix ordering for lzcnt tests. · 83e04913
  Simon Pilgrim authored Feb 06, 2016
  83e04913
- [X86][SSE] Regenerate vector shift tests · a09a154c
  Simon Pilgrim authored Feb 06, 2016
  a09a154c
- line endings fix · 63b1ecab
  Simon Pilgrim authored Feb 06, 2016
  63b1ecab
- [X86][SSE] Don't replace an existing 32-bit load with its duplicate · 9e369f2a
  Simon Pilgrim authored Feb 06, 2016
  9e369f2a
Feb 05, 2016
- AMDGPU: Account for LDS alignment · 7f83397d
  Matt Arsenault authored Feb 05, 2016
  7f83397d
- AMDGPU: Preserve alignments on new created globals · cf84e26f
  Matt Arsenault authored Feb 05, 2016
  cf84e26f
- Some stackslots are allocated to vregs which have no real reference. · a62f0589
  Wei Mi authored Feb 05, 2016
  a62f0589