- Oct 30, 2010
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Jakob Stoklund Olesen authored
llvm-svn: 117761
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Bob Wilson authored
There were a number of issues to fix up here: * The "device" argument of the llvm.memory.barrier intrinsic should be used to distinguish the "Full System" domain from the "Inner Shareable" domain. It has nothing to do with using DMB vs. DSB instructions. * The compiler should never need to emit DSB instructions. Remove the ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB. * Merge the separate DMB/DSB instructions for options only used for the disassembler with the default DMB/DSB instructions. Add the default "full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum. * Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement a data memory barrier using the MCR instruction. * Fix up encodings for these instructions (except MCR). I also updated the tests and added a few new ones to check for DMB options that were not currently being exercised. llvm-svn: 117756
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Jim Grosbach authored
llvm-svn: 117753
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Bill Wendling authored
conditional. Check for those instructions explicitly. llvm-svn: 117747
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Jim Grosbach authored
llvm-svn: 117742
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Jim Grosbach authored
llvm-svn: 117741
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Jim Grosbach authored
llvm-svn: 117740
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Jim Grosbach authored
encoder functions. llvm-svn: 117738
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Evan Cheng authored
llvm-svn: 117737
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Rafael Espindola authored
just .type foo,@object will produce an undefined reference to foo. On the other hand, a file with just .weakref bar, foo will not. It is somewhat hard to support both in MC since both statements should create the symbols. It should be possible if we really need to by adding to the flags, but hopefully that is not necessary. With this patch we do not produce a undefined reference in any of those cases. The assembly file needs an actual use for the undefined reference to be present. This is in preparation for a patch implementing .weakref. llvm-svn: 117735
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Bob Wilson authored
llvm-svn: 117728
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Bob Wilson authored
llvm-svn: 117727
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Bob Wilson authored
llvm-svn: 117722
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Bob Wilson authored
This code had previously used 2*N, where N is the mask length, to represent undef. That is not safe because the shufflevector operands may have more than N elements -- they don't have to match the result type. llvm-svn: 117721
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Bob Wilson authored
llvm-svn: 117720
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Bob Wilson authored
Allow splats even if they don't match either of the original shuffles, possibly due to undef entries in the shuffles masks. Radar 8597790. Also fix some 80-column violations. llvm-svn: 117719
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- Oct 29, 2010
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Jim Grosbach authored
llvm-svn: 117718
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Jim Grosbach authored
the ARMExpandPseudos pass rather than during the asm lowering. llvm-svn: 117714
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Eric Christopher authored
failure for llvm-gcc on arm fast isel. llvm-svn: 117710
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Owen Anderson authored
Give up on doing in-line instruction simplification during correlated value propagation. Instruction simplification needs to be guaranteed never to be run on an unreachable block. However, earlier block simplifications may have changed the CFG to make block that were reachable when we began our iteration unreachable by the time we try to simplify them. (Note that this also means that our depth-first iterators were potentially being invalidated). This should not have a large impact on code quality, since later runs of instcombine should pick up these simplifications. Fixes PR8506. llvm-svn: 117709
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Jim Grosbach authored
handle it in the asm lowering. llvm-svn: 117707
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Jim Grosbach authored
llvm-svn: 117703
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Jim Grosbach authored
llvm-svn: 117702
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Dan Gohman authored
they may have ValuesAtScopes map entries referencing their outer loops. This fixes a user-after-free reported in PR8471. llvm-svn: 117698
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Jim Grosbach authored
llvm-svn: 117695
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Jim Grosbach authored
llvm-svn: 117687
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Jakob Stoklund Olesen authored
llvm-svn: 117677
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Evan Cheng authored
operand and one of them has a single use that is a live out copy, favor the one that is live out. Otherwise it will be difficult to eliminate the copy if the instruction is a loop induction variable update. e.g. BB: sub r1, r3, #1 str r0, [r2, r3] mov r3, r1 cmp bne BB => BB: str r0, [r2, r3] sub r3, r3, #1 cmp bne BB This fixed the recent 256.bzip2 regression. llvm-svn: 117675
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Evan Cheng authored
- Compute CopyToReg use operand latency correctly. llvm-svn: 117674
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Jakob Stoklund Olesen authored
llvm-svn: 117673
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Jim Grosbach authored
llvm-svn: 117672
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Benjamin Kramer authored
llvm-svn: 117671
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Jakob Stoklund Olesen authored
We don't want unused values forming their own equivalence classes, so we lump them all together in one class, and then merge them with the class of the last used value. llvm-svn: 117670
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Jakob Stoklund Olesen authored
llvm-svn: 117669
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John Thompson authored
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. llvm-svn: 117667
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Dan Gohman authored
llvm-svn: 117666
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Dan Gohman authored
messages primarily indicate errors running the viewer, not errors with the graph file itself. llvm-svn: 117665
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Dan Gohman authored
being not found from the file being not executable. llvm-svn: 117664
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Jim Grosbach authored
llvm-svn: 117663
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