creating it before and subtracting split ranges.

This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.

This is a work in progress and probably quite broken.

llvm-svn: 114492

llvm-svn: 114490

that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.

llvm-svn: 114489

If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.

llvm-svn: 114478

llvm-svn: 114474

the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.

llvm-svn: 114473

matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

llvm-svn: 114472

llvm-svn: 114469

I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

llvm-svn: 114464

llvm-svn: 114463

llvm-svn: 114461

llvm-svn: 114459

llvm-svn: 114455

and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454

MachinePointerInfo around more.

llvm-svn: 114452

llvm-svn: 114450

with an indexed load/store that has an offset in the index.

llvm-svn: 114449

instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

llvm-svn: 114448

llvm-svn: 114447

SelectionDAG::getExtLoad overload, and eliminate it.

llvm-svn: 114446

getLoad overloads.

llvm-svn: 114443

with SVOffset computation.

llvm-svn: 114442

llvm-svn: 114437

no functionality change (step #1)

llvm-svn: 114436

llvm-svn: 114431

Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals).

llvm-svn: 114429

into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

llvm-svn: 114428

pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.

llvm-svn: 114411

llvm-svn: 114409

"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406

instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401

llvm-svn: 114400

MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.

llvm-svn: 114399

llvm-svn: 114397

eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396

llvm-svn: 114395

MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.

llvm-svn: 114393

to the MachineFunction construction methods.

llvm-svn: 114390

MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

llvm-svn: 114389

define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372