Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.

llvm-svn: 77962

llvm-svn: 77956

llvm-svn: 77944

Thanks to Eli Friedman for noticing it.

llvm-svn: 77942

Fixes PR4669

llvm-svn: 77940

- Tidy up some headers.

llvm-svn: 77929

 - The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927

pushes in the function prolog if the function doesn't have any stack space,
i.e. for a prolog like:

0x40011870:     push %r15
0x40011872:     push %r14
0x40011874:     push %rbx

Patch by Zoltan!

llvm-svn: 77919

Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

llvm-svn: 77895

llvm-svn: 77894

llvm-svn: 77893

TLOF, unifying all the dwarf targets at the same time.

llvm-svn: 77889

llvm-svn: 77888

the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877

defaults to being ELF.

llvm-svn: 77866

no longer depends on TM!

llvm-svn: 77863

llvm-svn: 77861

even considering #if 0 code.

llvm-svn: 77856

getLSDASection() to be more specific.  This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode.  We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.

Someone who cares about ELF C++ should investigate this.

llvm-svn: 77847

operands.

llvm-svn: 77837

compute it based on what it knows.  As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.

The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations.  If this is a
problem, let me know and we'll come up with another solution.

llvm-svn: 77833

llvm-svn: 77820

llvm-svn: 77806

llvm-svn: 77795

llvm-svn: 77768

be more careful about the return value of runOnMachineFunction.

llvm-svn: 77758

llvm-svn: 77757

llvm-svn: 77755

 - Operands which are just a label should be parsed as immediates, not memory
   operands (from the assembler perspective).

 - Match a few more flavors of immediates.

 - Distinguish match functions for memory operands which don't take a segment
   register.

 - We match the .s for "hello world" now!

llvm-svn: 77745

thing is #if0'd out anyway.  Just simplify the code by reducing the interface.
Not deleting this is essential for Bill's continuing happiness.

llvm-svn: 77736

Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.

llvm-svn: 77728

metadata related, which I'm waiting on to avoid conflicting with Devang.

llvm-svn: 77721

llvm-svn: 77718

MCSection subclasses yet, but this is a step in the right direction.

llvm-svn: 77708

initialize method, which can be called when an MCContext is available.

llvm-svn: 77687

llvm-svn: 77673

 - This is "experimental" code, I am feeling my way around and working out the
   best way to do things (and learning tblgen in the process). Comments welcome,
   but keep in mind this stuff will change radically.

 - This is enough to match "subb" and friends, but not much else. The next step is to
   automatically generate the matchers for individual operands.

llvm-svn: 77657

llvm-svn: 77602

classes. And define its SubRegClassList.

llvm-svn: 77601