PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

llvm-svn: 145853

them.

llvm-svn: 145852

O32 with relocation-model=pic too.

llvm-svn: 145850

change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

llvm-svn: 145714

tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"

llvm-svn: 145451

llvm-svn: 145420

- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).  

llvm-svn: 145113

llvm-svn: 145112

llvm-svn: 144849

llvm-svn: 144847

nodes.

llvm-svn: 144841

llvm-svn: 144840

and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.

llvm-svn: 144788

registers and instructions when ABI is N64.

llvm-svn: 144666

register.

llvm-svn: 144665

llvm-svn: 144664

llvm-svn: 144655

llvm-svn: 144654

llvm-svn: 144560

llvm-svn: 144554

N32/64 places all variable arguments in integer registers (or on stack),
regardless of their types, but follows calling convention of non-vaarg function
when it handles fixed arguments.

llvm-svn: 144553

llvm-svn: 144552

argument registers on the callee's stack frame, along with functions that set
and get it.
    
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.

llvm-svn: 144549

llvm-svn: 144453

llvm-svn: 144452

llvm-svn: 144449

llvm-svn: 144448

llvm-svn: 144447

build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
 - The hope is that we have a tool/test to verify these are accurate (and tight) soon.

llvm-svn: 144444

llvm-svn: 144423

"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414

type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.

llvm-svn: 144373

llvm-svn: 144372

llvm-svn: 144371

llvm-svn: 144370

llvm-svn: 144368

llvm-svn: 144367

VK_Mips_GPOFF_HI/LO.

llvm-svn: 144366

LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.

llvm-svn: 144344

handle defining the "magic" target related components (like native,
nativecodegen, and engine).
 - We still require these components to be in the project (currently in
   lib/Target) so that we have a place to document them and hopefully make it
   more obvious that they are "magic".

llvm-svn: 144253