ScheduleDAG's TLI member to use const.

llvm-svn: 64018

llvm-svn: 63993

Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.

llvm-svn: 63992

llvm-svn: 63989

llvm-svn: 63988

getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.

llvm-svn: 63978

llvm-svn: 63969

A simple test program shows that debugging works. :-)

llvm-svn: 63968

addresses to symbols.

llvm-svn: 63962

llvm-svn: 63951

llvm-svn: 63943

llvm-svn: 63938

Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.

llvm-svn: 63936

llvm-svn: 63909

its corresponding getTargetNode.  Lots of
caller changes.

llvm-svn: 63904

llvm-svn: 63889

llvm-svn: 63852

llvm-svn: 63812

llvm-svn: 63808

llvm-svn: 63800

Adjust callers.

llvm-svn: 63789

and llvm-gcc.

llvm-svn: 63786

Adjust the many callers of those versions.

llvm-svn: 63767

target directories themselves.  This also means that VMCore no longer
needs to know about every target's list of intrinsics.  Future work
will include converting the PowerPC target to this interface as an
example implementation.

llvm-svn: 63765

llvm-svn: 63752

SSE disabled.

llvm-svn: 63751

llvm-svn: 63740

of Lod and Sto; patch uses.

llvm-svn: 63716

functions, with callers adjusted to fit.

llvm-svn: 63705

functions.

llvm-svn: 63703

of undefs and incorrectly determining if we have punpckldq.

llvm-svn: 63702

llvm-svn: 63693

llvm-svn: 63674

have it yet.  More coming.

llvm-svn: 63673

llvm-svn: 63664

llvm-svn: 63656

llvm-svn: 63650

is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.

llvm-svn: 63642

created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.

llvm-svn: 63584

SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.

llvm-svn: 63575