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  1. Jul 01, 2009
  2. Jun 24, 2009
  3. Jun 17, 2009
  4. Jun 16, 2009
  5. Apr 30, 2009
  6. Apr 29, 2009
    • Bill Wendling's avatar
      Second attempt: · 084669a1
      Bill Wendling authored
      Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
      use the old behavior, the flag is -O0. This change allows for finer-grained
      control over which optimizations are run at different -O levels.
      
      Most of this work was pretty mechanical. The majority of the fixes came from
      verifying that a "fast" variable wasn't used anymore. The JIT still uses a
      "Fast" flag. I'll change the JIT with a follow-up patch.
      
      llvm-svn: 70343
      084669a1
  7. Apr 28, 2009
  8. Mar 25, 2009
  9. Feb 24, 2009
  10. Nov 15, 2008
  11. Oct 14, 2008
  12. Sep 15, 2008
  13. Aug 21, 2008
  14. Aug 06, 2008
    • Bruno Cardoso Lopes's avatar
      Added support for fp callee saved registers. · 4659aad6
      Bruno Cardoso Lopes authored
      Added fp register clobbering during calls.
      Added AsmPrinter support for "fmask", a bitmask that indicates where on the 
      stack the fp callee saved registers are.
      
      Fixed the stack frame layout for Mips, now the callee saved regs 
      are in the right stack location (a little documentation about how this
      stack frame must look like is present in MipsRegisterInfo.cpp).
      This was done using the method MipsRegisterInfo::adjustMipsStackFrame
      To be more clear, these are examples of what is solves :  
      
      1) FP and RA are also callee saved, and despite they aren't in CSI they 
         must be saved before the fp callee saved registers. 
      2) The ABI requires that local varibles are allocated before the callee 
         saved register area, the opposite behavior from the default allocation.
      3) CPU and FPU saved register area must be aligned independent of each
         other.
      
      llvm-svn: 54403
      4659aad6
  15. Jul 15, 2008
  16. Jul 14, 2008
    • Bruno Cardoso Lopes's avatar
      Added Subtarget support into RegisterInfo · 80ab8f96
      Bruno Cardoso Lopes authored
      Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and 
      -mno-shared). HasAbsoluteCall is not implemented but HasABICall is the 
      default for o32 ABI. Now, both should help into a more accurate 
      relocation types implementation. 
      Added IsLinux is needed to choose between asm directives.
      Instruction name strings cleanup.
      AsmPrinter improved.
      
      llvm-svn: 53551
      80ab8f96
  17. Jul 05, 2008
    • Bruno Cardoso Lopes's avatar
      Several changes to Mips backend, experimental fp support being the most · c9c3f499
      Bruno Cardoso Lopes authored
      important.
      - Cleanup in the Subtarget info with addition of new features, not all support
        yet, but they allow the future inclusion of features easier. Among new features,
        we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
        integer
        and float registers, allegrex vector FPU (VFPU), single float only support.
      - TargetMachine now detects allegrex core.
      - Added allegrex (Mips32r2) sext_inreg instructions.
      - *Added Float Point Instructions*, handling single float only, and
        aliased accesses for 32-bit FPUs.
      - Some cleanup in FP instruction formats and FP register classes.
      - Calling conventions improved to support mips 32-bit EABI.
      - Added Asm Printer support for fp cond codes.
      - Added support for sret copy to a return register.
      - EABI support added into LowerCALL and FORMAL_ARGS.
      - MipsFunctionInfo now keeps a virtual register per function to track the
        sret on function entry until function ret.
      - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
        FP cond codes mapping and initial FP Branch Analysis.
      - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
        FPCmp
      - MipsTargetLowering : handling different FP classes, Allegrex support, sret
        return copy, no homing location within EABI, non 32-bit stack objects
        arguments, and asm constraint for float.
      
      llvm-svn: 53146
      c9c3f499
  18. Jun 04, 2008
  19. May 13, 2008
  20. Mar 11, 2008
  21. Dec 29, 2007
  22. Nov 05, 2007
  23. Oct 09, 2007
    • Bruno Cardoso Lopes's avatar
      Position Independent Code (PIC) support [2] · 35d86e60
      Bruno Cardoso Lopes authored
      - Added a function to hold the stack location 
        where GP must be stored during LowerCALL
      - AsmPrinter now emits directives based on
        relocation type
      - PIC_ set to default relocation type (same as GCC)
      
      llvm-svn: 42779
      35d86e60
  24. Aug 28, 2007
  25. Aug 18, 2007
  26. Jul 12, 2007
  27. Jul 09, 2007
  28. Jun 06, 2007
    • Bruno Cardoso Lopes's avatar
      Initial Mips support, here we go! =) · 35e43c49
      Bruno Cardoso Lopes authored
      - Modifications from the last patch included
        (issues pointed by Evan Cheng are now fixed).
      - Added more MipsI instructions.
      - Added more patterns to match branch instructions.
      
      llvm-svn: 37461
      35e43c49
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