- Feb 10, 2010
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Chris Lattner authored
displacement values. llvm-svn: 95773
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Chris Lattner authored
throughout the X86 encoder. llvm-svn: 95771
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Chris Lattner authored
even for the immediate case. No functionality change. llvm-svn: 95770
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Dan Gohman authored
pointer type. llvm-svn: 95769
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Daniel Dunbar authored
MCInst it came from. llvm-svn: 95767
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Evan Cheng authored
Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them. llvm-svn: 95757
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Daniel Dunbar authored
Also, fix a silly memory leak. llvm-svn: 95752
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Dale Johannesen authored
llvm-svn: 95749
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Chris Lattner authored
llvm-svn: 95748
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Evan Cheng authored
llvm-svn: 95747
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Evan Cheng authored
llvm-svn: 95746
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Chris Lattner authored
llvm-svn: 95745
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Chris Lattner authored
llvm-svn: 95742
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Bill Wendling authored
llvm-svn: 95740
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Dale Johannesen authored
register coalescing. This fixes many crashes and places where debug info affects codegen (when dbg.value is lowered to machine instructions, which it isn't yet in TOT). llvm-svn: 95739
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Chris Lattner authored
The major win of this is that the code is simpler and they print on the same line as the instruction again: movl %eax, 96(%esp) ## 4-byte Spill movl 96(%esp), %eax ## 4-byte Reload cmpl 92(%esp), %eax ## 4-byte Folded Reload jl LBB7_86 llvm-svn: 95738
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Bill Wendling authored
llvm-svn: 95737
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Dale Johannesen authored
llvm-svn: 95736
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Dale Johannesen authored
the field from being used uninitialized later in some cases. llvm-svn: 95735
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Chris Lattner authored
OutStreamer.AddBlankLine instead of textually. llvm-svn: 95734
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Kenneth Uildriks authored
IntegerValType holds a uint32_t, so its constructor should take a uint32_t. This allows it to be properly initialized with bit widths > 65535 llvm-svn: 95731
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Dale Johannesen authored
llvm-svn: 95730
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Kevin Enderby authored
prefix which is part of the opcode encoding. llvm-svn: 95729
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Chris Lattner authored
Enhance the x86 backend to show the hex values of immediates in comments when they are large. For example: movl $1072693248, 4(%esp) ## imm = 0x3FF00000 llvm-svn: 95728
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David Greene authored
TableGen fragment refactoring. Move some utility TableGen defs, classes, etc. into a common file so they may be used my multiple pattern files. We will use this for the AVX specification to help with the transition from the current SSE specification. llvm-svn: 95727
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Johnny Chen authored
A8.6.279 llvm-svn: 95713
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David Greene authored
Only dump output in debug mode. llvm-svn: 95711
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Daniel Dunbar authored
llvm-mc: Add --show-fixups option, for displaying the instruction fixup information in the asm comments. llvm-svn: 95710
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Daniel Dunbar authored
llvm-svn: 95709
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- Feb 09, 2010
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Daniel Dunbar authored
llvm-svn: 95708
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Bill Wendling authored
llvm-svn: 95707
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Johnny Chen authored
A8.6.335 & A8.6.336 llvm-svn: 95703
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Chris Lattner authored
llvm-svn: 95699
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Chris Lattner authored
in X86-32 mode. This is still required in x86-64 mode to avoid forming [disp+rip] encoding. Rewrite the SIB byte decision logic to be actually understandable. llvm-svn: 95693
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Eric Christopher authored
enable constant 0 offset lowering. llvm-svn: 95691
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Chris Lattner authored
a confusing idiom to check for ESP or RSP. llvm-svn: 95690
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Chris Lattner authored
llvm-svn: 95689
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Chris Lattner authored
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
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Jim Grosbach authored
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to register instruction only works with low registers. Allowing high registers for the instruction resulted in the assembler choosing the wide (32-bit) encoding for the mov, but LLVM though the instruction was only 16 bits wide, so offset calculations for constant pools became incorrect, leading to out of range constant pool entries. llvm-svn: 95686
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Eric Christopher authored
consuming for a simple optimization. llvm-svn: 95671
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