Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

llvm-svn: 27201

llvm-svn: 27192

llvm-svn: 27182

llvm-svn: 27181

llvm-svn: 27173

llvm-svn: 27171

llvm-svn: 27169

floating point cases.

llvm-svn: 27165

llvm-svn: 27164

llvm-svn: 27158

manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156

llvm-svn: 27155

llvm-svn: 27154

llvm-svn: 27147

llvm-svn: 27146

llvm-svn: 27133

false

llvm-svn: 27131

llvm-svn: 27130

llvm-svn: 27128

llvm-svn: 27089

llvm-svn: 27079

llvm-svn: 27071

llvm-svn: 27063

using a splat for {1.0,1.0,1.0,1.0}

llvm-svn: 27055

llvm-svn: 27053

Legalize intrinsic nodes.

llvm-svn: 27036

llvm-svn: 27035

llvm-svn: 27032

the target can handle it). Issue two SCALAR_TO_VECTOR ops followed by a
VECTOR_SHUFFLE to select from the two vectors.

llvm-svn: 27023

llvm-svn: 27020

llvm-svn: 27004

llvm-svn: 27002

CodeGen/Generic/vector.ll:test_cast_2.

llvm-svn: 26999

llvm-svn: 26989

llvm-svn: 26988

llvm-svn: 26972

llvm-svn: 26965

casts between legal vector types.

llvm-svn: 26961

SingleSource/UnitTests/Vector/build.c

llvm-svn: 26936

llvm-svn: 26934