This fixes a bug where splitSingleBlocks() could split a live range after a
terminator instruction.

llvm-svn: 125237

llvm-svn: 125232

No functional changes intended.

llvm-svn: 125231

llvm-svn: 125226

llvm-svn: 125225

The tag is updated whenever the live interval union is changed, and it is tested
before using cached information.

llvm-svn: 125224

Registers are not allocated strictly in spill weight order when live range
splitting and spilling has created new shorter intervals with higher spill
weights.

When one of the new heavy intervals conflicts with a single lighter interval,
simply evict the old interval instead of trying to split the heavy one.

The lighter interval is a better candidate for splitting, it has a smaller use
density.

llvm-svn: 125151

This almost guarantees that the COPY will be coalesced.

llvm-svn: 125140

llvm-svn: 125137

The last split point can be anywhere in the block, so it interferes with the
strictly monotonic requirements of advanceTo().

llvm-svn: 125132

instruction in a basic block.

llvm-svn: 125116

This is a lot easier than trying to get kill flags right during live range
splitting and rematerialization.

llvm-svn: 125113

llvm-svn: 125109

The target hook doesn't know how to do that. (Neither do I).

llvm-svn: 125108

If a live range is used by a terminator instruction, and that live range needs
to leave the block on the stack or in a different register, it can be necessary
to have both sides of the split live at the terminator instruction.

Example:

  %vreg2 = COPY %vreg1
  JMP %vreg1

Becomes after spilling %vreg2:

  SPILL %vreg1
  JMP %vreg1

The spill doesn't kill the register as is normally the case.

llvm-svn: 125102

llvm-svn: 125101

Avoid using the same register for two def operands or and earlyclobber
def and use operand. This fixes PR8986 and improves on the prior fix
for rdar://problem/8959122.

llvm-svn: 125089

After uses of a live range are removed, recompute the live range to only cover
the remaining uses. This is necessary after rematerializing the value before
some (but not all) uses.

llvm-svn: 125058

llvm-svn: 125054

<rdar://problem/8959122> illegal register operands for UMULL instruction in cfrac nightly test
I'm stil working on a unit test, but the case is:
rx = movcc rx, r3
r2 = ldr
r2, r3 = umull r2, r2

The anti-dep breaker should not convert this into an illegal instruction:
r2, r2 = umull

llvm-svn: 124932

If the interference overlaps the instruction, we cannot separate it.

llvm-svn: 124918

If these inequalities don't hold, we are creating a live range split that won't
allocate.

llvm-svn: 124917

In that case we simply ignore the landing pad and split live ranges before the
first terminator.

llvm-svn: 124907

llvm-svn: 124904

purpose. Fixes PR9080!

llvm-svn: 124903

If interference reaches the last split point, it is effectively live out and
should be marked as 'MustSpill'.

This can make a difference when the terminator uses a register. There is no way
that register can be reused in the outgoing CFG bundle, even if it isn't live
out.

llvm-svn: 124900

A live range cannot be split everywhere in a basic block. A split must go before
the first terminator, and if the variable is live into a landing pad, the split
must happen before the call that can throw.

llvm-svn: 124894

We should not be attempting a region split if it won't lead to at least one
directly allocatable interval. That could cause infinite splitting loops.

llvm-svn: 124893

precisely track pressure on a selection DAG, but we can at least keep
it balanced. This design accounts for various interesting aspects of
selection DAGS: register and subregister copies, glued nodes, dead
nodes, unused registers, etc.

Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter.

Note: I disabled PrescheduleNodesWithMultipleUses when register
pressure is enabled, based on no evidence other than I don't think it
makes sense to have both enabled.

llvm-svn: 124853

DebugLoc associated with a machine instruction is used to emit location entries. DebugLoc associated with a DBG_VALUE is used to identify lexical scope of the variable. After register allocation, while inserting DBG_VALUE remember original debug location for the first instruction and reuse it, otherwise dwarf writer may be mislead in identifying the variable's scope.

llvm-svn: 124845

llvm-svn: 124843

llvm-svn: 124842

When the live range is live through a block that doesn't use the register, but
that has interference, region splitting wants to split at the top and bottom of
the basic block.

llvm-svn: 124839

Allow a live range to end with a kill flag, but don't allow a kill flag that
doesn't end the live range.

This makes the machine code verifier more useful during register allocation when
kill flag computation is deferred.

llvm-svn: 124838

llvm-svn: 124827

llvm-svn: 124815

llvm-svn: 124814

llvm-svn: 124813

If the found value is not live-through the block, we should only add liveness up
to the requested slot index. When the value is live-through, the whole block
should be colored.

Bug found by SSA verification in the machine code verifier.

llvm-svn: 124812

These end points come from the inserted copies, and can be passed directly to
useIntv. This simplifies the coloring code.

llvm-svn: 124799