reads or writes a register.

This takes partial redefines and undef uses into account.

Don't actually use it yet. That caused miscompiles.

llvm-svn: 104372

This reverts r104322. I think it was causing miscompilations.

llvm-svn: 104323

This correctly handles partial redefines and undef uses.

llvm-svn: 104322

<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.

llvm-svn: 104320

partial redefines.

We are going to treat a partial redefine of a virtual register as a
read-modify-write:

  %reg1024:6 = OP

Unless the register is fully clobbered:

  %reg1024:6 = OP, %reg1024<imp-def>

MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.

llvm-svn: 104149

when they move instructions.

llvm-svn: 103737

Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707

llvm-svn: 102518

llvm-svn: 100850

llvm-svn: 100849

%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>

llvm-svn: 100804

MachineOperand::isIdenticalTo wasn't handling metadata operands.

llvm-svn: 100636

llvm-svn: 100215

representation.  This eliminates the 'DILocation' MDNodes for 
file/line/col tuples from -O0 -g codegen.

This remove the old DebugLoc class, making it a typedef for DebugLoc,
I'll rename NewDebugLoc next.

I didn't update the JIT to use the new apis, so it will continue to
work, but be as slow as before.  Someone should eventually do this
or, better yet, rip out the JIT debug info stuff and build the JIT
on top of MC.

llvm-svn: 100209

llvm-svn: 98433

This is a first step towards eliminating checks in Descriptor constructors.

llvm-svn: 97975

llvm-svn: 97963

This is a first step towards eliminating unncessary constructor checks in light weight DIDescriptor wrappers.

llvm-svn: 97947

Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing.

llvm-svn: 97680

llvm-svn: 97670

- Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628

llvm-svn: 97578

Add non-temporal flags to MachineMemOperand.

llvm-svn: 96226

llvm-svn: 95781

the field from being used uninitialized later in some cases.

llvm-svn: 95735

into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687

instructions.

llvm-svn: 93925

llvm-svn: 93630

dumper doesn't really do what I want yet, but
at least it doesn't crash now.

llvm-svn: 93272

An instruction like this:

  %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0

Must be replaced with this when substituting physical registers:

  %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def>

llvm-svn: 92812

Change errs() to dbgs().

llvm-svn: 92545

llvm-svn: 92214

llvm-svn: 92159

llvm-svn: 92158

llvm-svn: 91554

llvm-svn: 90815

the column number if it is not known. Handle the case of a missing filename
better.

llvm-svn: 90630

llvm-svn: 90488

llvm-svn: 90395

DICompileUnit. This code now prints debug filenames successfully.

llvm-svn: 90181

no filename. This situation is apparently fairly common right now.

llvm-svn: 89701