Commits · 7dd529e54da8daf143a359cac16dbaeafe9a7835 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jun 18, 2019
- [X86] Replace any_extend* vector extensions with zero_extend* equivalents · 7dd529e5
  Simon Pilgrim authored Jun 18, 2019
  7dd529e5
- [DebugInfo][Docs] Document that prologue/epilogue variable location changes are ignored · a1a4f5f1
  Jeremy Morse authored Jun 18, 2019
  a1a4f5f1
- [SimplifyCFG] NFC, prof branch_weighs handling is simplified · 69daf4a7
  Yevgeny Rouban authored Jun 18, 2019
  69daf4a7
- [llvm-objdump] Tidy up AMDGCNPrettyPrinter · 291e11ea
  Fangrui Song authored Jun 18, 2019
  291e11ea
- [X86] Add i128 ctpop and i32/i64/i128 optsize test cases to popcnt.ll · 02a445c2
  Craig Topper authored Jun 18, 2019
  02a445c2
- [X86] Move code that shrinks immediates for ((x << C1) op C2) into a helper function. NFCI · f4284f8a
  Craig Topper authored Jun 18, 2019
  f4284f8a
- [X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr CodeGenOnly instructions. · 58742771
  Craig Topper authored Jun 18, 2019
  58742771
- [X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class. · 8582ecd8
  Craig Topper authored Jun 18, 2019
  8582ecd8
- GlobalISel: Remove redundant pass initialization · 1f7f6466
  Tom Stellard authored Jun 18, 2019
  1f7f6466
- [llvm-strip] Error when using stdin twice · 77477009
  Alex Brachet authored Jun 18, 2019
  77477009
- GlobalISel: Use the original flags when lowering fneg to fsub · 5a321b89
  Matt Arsenault authored Jun 17, 2019
  5a321b89
- hwasan: Use bits [3..11) of the ring buffer entry address as the base stack tag. · d57f7cc1
  Peter Collingbourne authored Jun 17, 2019
  d57f7cc1
- hwasan: Add a tag_offset DWARF attribute to instrumented stack variables. · fb9ce100
  Peter Collingbourne authored Jun 17, 2019
  fb9ce100
- gn build: Merge r363626. · c3b6d777
  Peter Collingbourne authored Jun 17, 2019
  c3b6d777
- [GlobalISel][Localizer] Rewrite localizer to run in 2 phases, inter & intra block. · 14688224
  Amara Emerson authored Jun 17, 2019
  14688224
- Propagate fmf in IRTranslate for fneg · f9bff2a5
  Michael Berg authored Jun 17, 2019
  f9bff2a5
- Use VR128X instead of FR32X/FR64X for the register class in VMOVSSZmrk/VMOVSDZmrk. · 971ad74b
  Craig Topper authored Jun 17, 2019
  971ad74b
- [X86] Make an assert in LowerSCALAR_TO_VECTOR stricter to make it clear what... · 0e183008
  Craig Topper authored Jun 17, 2019
  0e183008
- [AMDGPU] Use custom inserter for gfx10 VOP2b · 12195610
  Stanislav Mekhanoshin authored Jun 17, 2019
  12195610
Jun 17, 2019
- [AMDGPU] gfx1010 subvector test. NFC. · ca42687d
  Stanislav Mekhanoshin authored Jun 17, 2019
  ca42687d
- [test][AArch64] Relax the check line for G_BRJT in legalizer-info-validation.mir · 689509ed
  Volkan Keles authored Jun 17, 2019
  689509ed
- Teach getSCEVAtScope how to handle loop phis w/invariant operands in loops w/taken backedges · 44475363
  Philip Reames authored Jun 17, 2019
  44475363
- Add convenience utility for replacing a range within a container with a · 496f77f3
  Richard Smith authored Jun 17, 2019
  496f77f3
- [globalisel] Fix iterator invalidation in the extload combines · 184c8ee9
  Daniel Sanders authored Jun 17, 2019
  184c8ee9
- [AMDGPU] Propagate function attributes thru bitcasts · 31382782
  Stanislav Mekhanoshin authored Jun 17, 2019
  31382782
- Fix a bug w/inbounds invalidation in LFTR (recommit) · fe8bd96e
  Philip Reames authored Jun 17, 2019
  fe8bd96e
- gn build: Merge r363483. · 72adaf3e
  Peter Collingbourne authored Jun 17, 2019
  72adaf3e
- gn build: Merge r363584. · cf73dc75
  Peter Collingbourne authored Jun 17, 2019
  cf73dc75
- AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer · ae4fcb97
  Nicolai Haehnle authored Jun 17, 2019
  ae4fcb97
- Reduced test case for pr42279 in advance of the relevant re-commit + fix · 58c75565
  Philip Reames authored Jun 17, 2019
  58c75565
- AMDGPU: Explicitly define a triple for some tests · 8af7198c
  Nicolai Haehnle authored Jun 17, 2019
  8af7198c
- [EarlyCSE] Fix hashing of self-compares · daa1ae61
  Joseph Tremoulet authored Jun 17, 2019
  daa1ae61
- [MemorySSA] Don't use template when the clone is a simplified instruction. · 7a0098aa
  Alina Sbirlea authored Jun 17, 2019
  7a0098aa
- [GlobalISel][AArch64] Fold G_SUB into G_ICMP when it's safe to do so · 49537bbf
  Jessica Paquette authored Jun 17, 2019
  49537bbf
- [X86] Add TB_NO_REVERSE to some memory folding table entries where the... · f3f968ad
  Craig Topper authored Jun 17, 2019
  f3f968ad
- LiveInterval.h: add LiveRange::findIndexesLiveAt function - return a list of... · bf3c59f7
  Valery Pykhtin authored Jun 17, 2019
  bf3c59f7
- [X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026) · 835999e4
  Simon Pilgrim authored Jun 17, 2019
  835999e4
- AMDGPU: Make getreg intrinsic inaccessiblememonly · 5d942d5a
  Matt Arsenault authored Jun 17, 2019
  5d942d5a
- [MemorySSA] Add all MemoryPhis before filling their values. · 05f77803
  Alina Sbirlea authored Jun 17, 2019
  05f77803
- [AMDGPU] gfx1010 wavefrontsize intrinsic folding · a9191c84
  Stanislav Mekhanoshin authored Jun 17, 2019
  a9191c84