llvm-svn: 24139

llvm-svn: 24130

not compiling a whole program at a time :)

llvm-svn: 24129

llvm-svn: 24107

llvm-svn: 24075

llvm-svn: 24073

tracked as PR642

llvm-svn: 24068

llvm-svn: 24067

llvm-svn: 24064

llvm-svn: 24051

llvm-svn: 24018

llvm-svn: 24017

llvm-svn: 24016

llvm-svn: 24013

llvm-svn: 24012

llvm-svn: 23994

machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.

llvm-svn: 23993

llvm-svn: 23991

llvm-svn: 23988

llvm-svn: 23987

llvm-svn: 23986

llvm-svn: 23985

llvm-svn: 23984

llvm-svn: 23982

if the dag combiner isn't run

llvm-svn: 23981

CPU.

llvm-svn: 23974

llvm-svn: 23909

llvm-svn: 23906

future.

llvm-svn: 23902

llvm-svn: 23892

to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.

llvm-svn: 23880

llvm-svn: 23878

let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code

llvm-svn: 23874

llvm-svn: 23870

haven't seen it fire on our testsuite.

llvm-svn: 23863

Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853

llvm-svn: 23842

that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835

Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830

doing something clever.

llvm-svn: 23824