llvm-svn: 45870

llvm-svn: 45869

Actually were not riding any arguments. Sadly there is no semantic spell checker that is going to safe you from such a mistake.

llvm-svn: 45868

commit all arguments where moved to the stack slot where they would
reside on a normal function call before the lowering to the tail call
stack slot. This was done to prevent arguments overwriting each other.
Now only arguments sourcing from a FORMAL_ARGUMENTS node or a
CopyFromReg node with virtual register (could also be a caller's
argument) are lowered indirectly.

 --This line, and those below, will be ignored--

M    X86/X86ISelLowering.cpp
M    X86/README.txt

llvm-svn: 45867

llvm-svn: 45865

llvm-svn: 45861

llvm-svn: 45860

llvm-svn: 45859

Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848

both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843

llvm-svn: 45838

x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects.  It would be really nice if we could
write patterns for copy instructions.

I have audited all the x86 instructions down to MOVDQAmr.  The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.

llvm-svn: 45829

llvm-svn: 45826

inferred from the instr patterns.

llvm-svn: 45824

llvm-svn: 45821

or being side-effect free.

llvm-svn: 45816

llvm-svn: 45813

because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811

Do not use the stack pointer directly, issue a copyfromreg instead. Otherwise we can end up with something like ADD32ri %esp, x which two-address pass won't like.

llvm-svn: 45798

llvm-svn: 45792

llvm-svn: 45768

on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746

llvm-svn: 45734

llvm-svn: 45733

llvm-svn: 45731

llvm-svn: 45725

llvm-svn: 45723

llvm-svn: 45703

llvm-svn: 45701

llvm-svn: 45699

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.

llvm-svn: 45687

llvm-svn: 45680

llvm-svn: 45679

over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.

llvm-svn: 45677

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

Some day I'll get it all moved over...

llvm-svn: 45672

llvm-svn: 45668

llvm-svn: 45667

llvm-svn: 45638