llvm-svn: 110181

llvm-svn: 110179

(absolute difference with accumulate) intrinsics.  Radar 8228576.

llvm-svn: 110170

llvm-svn: 110167

llvm-svn: 110164

eliminate several const_casts.

Make CallSite implicitly convertible to ImmutableCallSite.

Rename the getModRefBehavior for intrinsic IDs to
getIntrinsicModRefBehavior to avoid overload ambiguity with CallSite,
which happens to be implicitly convertible to bool.

llvm-svn: 110155

Add support for using the FPSCR in conjunction with the vcvtr instruction, for controlling fp to int rounding.
Add support for the FLT_ROUNDS_ node now that the FPSCR is exposed.

llvm-svn: 110152

llvm-svn: 110135

llvm-svn: 110134

instructions with alignment 0, so that subsequent passes don't
need to bother checking the TargetData ABI size manually.

llvm-svn: 110128

XCore->XCoreGen
PIC16->PIC16CodeGen

After updating your working copy, the first build will fail because it
is using the old library dependencies. Start the build again and it
will work fine.

llvm-svn: 110127

llvm-svn: 110120

When the normalizeSpillWeights function was introduced, I forgot to remove this
normalization.

This change could affect register allocation. Hopefully for the better.

llvm-svn: 110119

llvm-svn: 110117

llvm-svn: 110115

llvm-svn: 110114

llvm-svn: 110113

around std::min vs static const friction.

llvm-svn: 110112

Patch by Cameron Esfahani!

llvm-svn: 110104

This reverts commit r110100

Wrong path caps.

llvm-svn: 110103

llvm-svn: 110101

Patch by Cameron Esfahani!

llvm-svn: 110100

llvm-svn: 110097

llvm-svn: 110091

are unknown.

llvm-svn: 110090

of Value deletions and RAUWs, instead of relying on ScalarEvolution's
Scalars map being notified, as that's complicated at best, and
insufficient in general.

This means SCEVUnknown needs a non-trivial destructor, so introduce
a mechanism to allow ScalarEvolution to locate all the SCEVUnknowns.

llvm-svn: 110086

llvm-svn: 110077

a redundant check from checkInstruction.

llvm-svn: 110076

llvm-svn: 110075

llvm-svn: 110074

llvm-svn: 110072

llvm-svn: 110069

llvm-svn: 110056

llvm-svn: 110045

llvm-svn: 110038

duplicate the instructions and operate on half vectors. 

Also reorder code in SPUInstrInfo.td for better coherency.

llvm-svn: 110037

llvm-svn: 110036

such registers in SPU, this support boils down to "emulating" 
them by duplicating instructions on the general purpose registers. 

This adds the most basic operations on v2i32: passing parameters,
addition, subtraction, multiplication and a few others.

llvm-svn: 110035

Fixes potential ambiguity problems on VS 2010.

Patch by nobled!

llvm-svn: 110029

llvm-svn: 110022