llvm-svn: 58533

llvm-svn: 58532

llvm-svn: 58529

llvm-svn: 58528

llvm-svn: 58527

llvm-svn: 58526

llvm-svn: 58524

llvm-svn: 58523

Change x86 register allocation ordering to match that of gcc. Otherwise some tools get confused by prologue generated by llvm.

llvm-svn: 58517

llvm-svn: 58514

completely forgotten about when writing LegalizeTypes.

llvm-svn: 58508

in such cases.

llvm-svn: 58505

callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.

llvm-svn: 58489

llvm-svn: 58486

vector element 0 for a store, as it's smaller and faster.

llvm-svn: 58483

Revert errant deletion. The target needs to be able to specify that it doesn't want the generic constant pool to be emitted.

llvm-svn: 58475

llvm-svn: 58474

optimizations accordingly.

llvm-svn: 58457

type for the shift amount type.  Add a check
that shifts and rotates use the type returned
by getShiftAmountTy for the amount.  This
exposed some problems in CellSPU and PPC,
which have already been fixed.

llvm-svn: 58455

(i32 for PPC, not i8).  Correct this, and some
formatting while there.

llvm-svn: 58451

function.
 - This explicitly models the costs for functions which should
   "always" or "never" be inlined. This fixes bugs where such costs
   were not previously respected.

llvm-svn: 58450

getShiftAmountTy (i32 in the case of CellSPU).

llvm-svn: 58449

llvm-svn: 58443

llvm-svn: 58433

One will only see an effect if legalizetype is not active.  Will move
support to LegalizeType soon.

llvm-svn: 58426

so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.

llvm-svn: 58415

llvm-svn: 58409

llvm-svn: 58408

llvm-svn: 58407

llvm-svn: 58403

allows ppcf128->int conversion to work with
DeadInstructionElimination.  This is now turned
off but RM is harmless.  It does not do a complete
job of modeling the rounding mode.

Revert marking MFCR as using all 7 CR subregisters;
while correct, this caused the problem in PR 2964,
plus the local RA crash noted in the comments.
This was needed to make DeadInstructionElimination,
but as we are not running that, it is backed out
for now.  Eventually it should go back in and the
other problems fixed where they're broken.

llvm-svn: 58391

llvm-svn: 58386

I don't really see this as being needed, but there is little harm from doing
it.

llvm-svn: 58385

VAARG.

llvm-svn: 58379

other day that PPC custom lowering could create
a BUILD_PAIR of two f64 with a result type of...
f64! - already fixed).  Fix a place that triggers
the sanity check.

llvm-svn: 58378

- If a def is spilt, remember its spill index to allow its reuse.

llvm-svn: 58375

is morphed by AnalyzeNewNode into a previously
processed node, and different result values of
that node are remapped to values with different
nodes, then we could end up using wrong values
here [we were assuming that all results remap
to values with the same underlying node].  This
seems theoretically possible, but I don't have
a testcase.  The meat of the patch is in the
changes to AnalyzeNewNode/AnalyzeNewValue and
ReplaceNodeWith.  While there, I changed names
like RemapNode to RemapValue, since it really
remaps values.  To tell the truth, I would be
much happier if we were only remapping nodes
(it would simplify a bunch of logic, and allow
for some cute speedups) but I haven't yet worked
out how to do that.

llvm-svn: 58372

llvm-svn: 58371

llvm-svn: 58370

- Create and update spill slot live intervals.
- Lots of bug fixes.

llvm-svn: 58367